Datasheet > A1359LLETR-T

A1359LLETR-T

更新时间： 2022-02-26 12:20:52

品牌	Logo	应用领域
急速微 - ALLEGRO		/
页数	文件大小	规格书
12页	279K
描述
Factory-Programmed Dual Output Linear Hall Effect Sensor IC With Analog and Pulse Width Modulated Outputs

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A1359LLETR-T 数据手册

Factory-Programmed Dual Output Linear Hall Effect Sensor IC

With Analog and Pulse Width Modulated Outputs

A1359

Package LE, 8-Pin TSSOP

0.45

8º

0º

0.65

3.00±0.10

0.20

0.09

1.70

6.10

6.40 BSC 4.40±0.10

+0.15

0.60

–0.10

2.20

1.00 REF

0.25 BSC

1.50

SEATING PLANE

GAUGE PLANE

PCB Layout Reference View

Branded Face

SEATING

PLANE

0.10

0.30

0.19

1.10 MAX

0.15

0.05

0.65 BSC

A1359LLETR-T

A1359LLETR-RP-T

For Reference Only; not for tooling use (reference MO-153 AA)

Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

Branding Reference View

Top line is device designator

Terminal #1 mark area

= Supplier emblem

Y = Last two digits of year of manufacture

W = Week of manufacture

Reference land pattern layout (reference IPC7351 SOP65P640X110-8M);

All pads a minimum of 0.20 mm from all adjacent pads; adjust as

necessary to meet application process requirements and PCB layout

tolerances; when mounting on a multilayer PCB, thermal vias can improve

thermal dissipation (reference EIA/JEDEC Standard JESD51-5)

Branding scale and appearance at supplier discretion

Hall element, not to scale

Active Area Depth 0.36 mm REF

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

1...8 9 101112

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