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9FGU0641 PDF预览

9FGU0641

更新时间: 2024-02-14 17:49:12
品牌 Logo 应用领域
艾迪悌 - IDT PC
页数 文件大小 规格书
15页 211K
描述
6 O/P 1.5V PCIe Gen1-2-3 Clock Generator

9FGU0641 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:VFQFPN
包装说明:HVQCCN,针数:40
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.77
JESD-30 代码:S-XQCC-N40JESD-609代码:e3
长度:5 mm湿度敏感等级:3
端子数量:40最高工作温度:70 °C
最低工作温度:最大输出时钟频率:25 MHz
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度(摄氏度):260主时钟/晶体标称频率:27 MHz
座面最大高度:1 mm最大供电电压:1.575 V
最小供电电压:1.425 V标称供电电压:1.5 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:NO LEAD端子节距:0.4 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:5 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches:1

9FGU0641 数据手册

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9FGU0641 DATASHEET  
Absolute Maximum Ratings  
Stresses above the ratings listed below can cause permanent damage to the 9FGU0641. These ratings, which are standard  
values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other  
conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum  
rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the  
recommended operating temperature range.  
PARAMETER  
SYMBOL  
CONDITIONS  
UNITS NOTES  
MIN  
-0.5  
-0.5  
TYP  
MAX  
2
VDD+0.5V  
Supply Voltage  
Input Voltage  
VDDxx  
VIN  
Applies to all VDD pins  
V
V
1,2  
1,3  
Input High Voltage, SMBus  
VIHSMB  
Ts  
Tj  
SMBus clock and data pins  
3.3V  
150  
125  
V
1
1
1
1
Storage Temperature  
Junction Temperature  
Input ESD protection  
-65  
°C  
°C  
V
ESD prot  
Human Body Model  
2000  
1Guaranteed by design and characterization, not 100% tested in production.  
2 Operation under these conditions is neither implied nor guaranteed.  
3 Not to exceed 2.5V.  
Electrical Characteristics–Current Consumption  
TA = TAMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions  
PARAMETER  
SYMBOL  
IDDAOP  
CONDITIONS  
MIN TYP MAX UNITS NOTES  
VDDA, All outputs active @100MHz  
6
9
mA  
All VDD, except VDDA and VDDIO, All outputs  
active @100MHz  
Operating Supply Current  
IDDOP  
8.6  
14  
mA  
IDDIOOP  
IDDAPD  
VDDIO, All outputs active @100MHz  
22  
30  
1
mA  
mA  
VDDA, DIF outputs off, REF output running  
All VDD, except VDDA and VDDIO,  
DIF outputs off, REF output running  
VDDIO, DIF outputs off, REF output running  
0.4  
2
2
2
Wake-on-LAN Current  
(CKPWRGD_PD# = '0'  
Byte 3, bit 5 = '1')  
IDDPD  
4.6  
7.5  
mA  
IDDIOPD  
IDDAPD  
IDDPD  
0.04  
0.4  
0.1  
1
mA  
mA  
mA  
mA  
VDDA, all outputs off  
All VDD, except VDDA and VDDIO, all outputs off  
VDDIO, all outputs off  
Powerdown Current  
(CKPWRGD_PD# = '0'  
Byte 3, bit 5 = '0')  
0.4  
1
IDDIOPD  
0.0003 0.1  
1 Guaranteed by design and characterization, not 100% tested in production.  
2 This is the current required to have the REF output running in Wake-on-LAN mode (Byte 3, bit 5 = 1)  
Electrical Characteristics–DIF Output Duty Cycle, Jitter, and Skew Characteristics  
TA = TAMB; Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN TYP MAX UNITS NOTES  
Duty Cycle  
tDC  
tsk3  
Measured differentially, PLL Mode  
Averaging on, VT = 50%  
45  
50  
32  
16  
55  
60  
50  
%
ps  
ps  
1,2  
1
Skew, Output to Output  
Jitter, Cycle to cycle  
tjcyc-cyc  
1,2  
1Guaranteed by design and characterization, not 100% tested in production.  
2 Measured from differential waveform  
OCTOBER 18, 2016  
5
6 O/P 1.5V PCIE GEN1-2-3 CLOCK GENERATOR W/ZO=100OHMS  

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