Datasheet > 9FGU0241

9FGU0241

更新时间： 2023-12-20 18:46:06

品牌	Logo	应用领域
瑞萨 - RENESAS		PC
页数	文件大小	规格书
16页	392K
描述
2-output 1.5 V PCIe Gen1-2-3 Clock Generator with Zo=100 ohms

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9FGU0241 数据手册

9FGU0241 DATASHEET

Absolute Maximum Ratings

Stresses above the ratings listed below can cause permanent damage to the 9FGU0241. These ratings, which are standard

values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these or any other

conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum

rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the

recommended operating temperature range.

PARAMETER

SYMBOL

CONDITIONS

UNITS NOTES

MIN

-0.5

TYP

MAX

V_DD+0.5V

Supply Voltage

Input Voltage

VDDxx

V_IN

Applies to all VDD pins

1,2

1,3

Input High Voltage, SMBus

V_IHSMB

SMBus clock and data pins

3.3V

150

125

Storage Temperature

Junction Temperature

Input ESD protection

-65

°C

ESD prot

Human Body Model

2000

¹Guaranteed by design and characterization, not 100% tested in production.

²Operation under these conditions is neither implied nor guaranteed.

³Not to exceed 2.5V.

Electrical Characteristics–Current Consumption

TA = T_AMB;Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions

PARAMETER

SYMBOL

I_DDAOP

CONDITIONS

MIN

TYP

6.6

MAX UNITS NOTES

VDDA, All outputs active @100MHz

Operating Supply Current

All VDD, except VDDA and VDDIO, All outputs

active @100MHz

I_DDOP

I_DDAPD

VDDA, DIF outputs off, REF output running

0.4

Wake-on-LAN Current

(CKPWRGD_PD# = '0'

Byte 3, bit 5 = '1')

All VDD, except VDDA and VDDIO,

DIF outputs off, REF output running

I_DDPD

3.8

Powerdown Current

(CKPWRGD_PD# = '0'

Byte 3, bit 5 = '0')

I_DDAPD

I_DDPD

VDDA, all outputs off

0.4

All VDD, except VDDA and VDDIO, all outputs off

¹Guaranteed by design and characterization, not 100% tested in production.

²This is the current required to have the REF output running in Wake-on-LAN mode (Byte 3, bit 5 = 1)

Electrical Characteristics–DIF Output Duty Cycle, Jitter, and Skew Characteristics

TA = T_AMB;Supply Voltages per normal operation conditions, See Test Loads for Loading Conditions

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX UNITS NOTES

Duty Cycle

t_DC

t_sk3

Measured differentially, PLL Mode

Averaging on, V_T= 50%

1,2

Skew, Output to Output

Jitter, Cycle to cycle

t_jcyc-cyc

1,2

¹Guaranteed by design and characterization, not 100% tested in production.

²Measured from differential waveform

OCTOBER 18, 2016

2 O/P 1.5V PCIE GEN1-2-3 CLOCK GENERATOR W/ZO=100OHMS

1 2 3 456 7 8...16

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