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9FGU0241 PDF预览

9FGU0241

更新时间: 2023-12-20 18:46:06
品牌 Logo 应用领域
瑞萨 - RENESAS PC
页数 文件大小 规格书
16页 392K
描述
2-output 1.5 V PCIe Gen1-2-3 Clock Generator with Zo=100 ohms

9FGU0241 数据手册

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Pin Configuration  
24 23 22 21 20 19  
XIN/CLKIN_25 1  
X2 2  
DIF1#  
DIF1  
18  
17  
16  
15  
14  
VDDXTAL1.5 3  
vSADR/REF1.5 4  
VDDA1.5  
GNDA  
DIF0#  
9FGU0241  
GNDREF  
GNDDIG  
5
6
13 DIF0  
7
8
9 10 11 12  
24-pin VFQFPN, 4x4 mm, 0.5mm pitch  
^ prefix indicates internal 120KOhm pull up resistor  
v prefix indicates internal 120KOhm pull down resistor  
SMBus Address Selection Table  
+
Read/Write Bit  
SADR  
0
1
Address  
1101000  
1101010  
x
x
State of SADR on first application  
of CKPWRGD_PD#  
Power Management Table  
SMBus  
CKPWRGD_PD#  
OE bit  
DIFx  
REF  
True O/P  
Low  
Comp. O/P  
Low  
Hi-Z1  
Running  
Low  
0
1
1
X
1
0
Running  
Low  
Running  
Low  
1. REF is Hi-Z until the 1st assertion of CKPWRGD_PD# high. After this,  
when CKPWRG_PD# is low, REF is Low.  
Power Connections  
Pin Number  
Description  
VDD  
3
7
11,20  
16  
GND  
5,24  
6
10,21  
15  
XTAL, REF  
Digital Power  
DIF outputs  
PLL Analog  
2 O/P 1.5V PCIE GEN1-2-3 CLOCK GENERATOR W/ZO=100OHMS  

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