ICS9EMS9633
Datasheet
ULTRAMOBILE PC CLOCK FOR EMBEDDEDAPPLICATIONS
SSOP Pin Description (continued)
PIN #
PIN NAME
TYPE
DESCRIPTION
25 VDDIO_1.5
PWR Power supply for low power differential outputs, nominal 1.5V.
Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm
series resistor. No 50ohm resistor to GND needed.
True clock of differential 0.8V push-pull SRC output with integrated 33ohm series
resistor. No 50ohm resistor to GND needed.
26 SRCC1_LPR
OUT
OUT
27 SRCT1_LPR
28 GNDSRC
PWR Ground pin for the SRC outputs
Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm
series resistor. No 50ohm resistor to GND needed.
29 SRCC2_LPR
OUT
True clock of differential 0.8V push-pull SRC output with integrated 33ohm series
resistor. No 50ohm resistor to GND needed.
Clock request for SRC2, 0 = enable, 1 = disable
Low threshold input for CPU frequency selection. Refer to input electrical
characteristics for Vil_FS and Vih_FS values.
30 SRCT2_LPR
31 *CR#2
OUT
IN
IN
32 FSB_L
Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
series resistor. No 50 ohm resistor to GND needed.
33 CPUC2_LPR
34 CPUT2_LPR
OUT
OUT
35 GNDCPU
PWR Ground pin for the CPU outputs
36 VDDIO_1.5
37 VDDCORE_3.3
PWR Power supply for low power differential outputs, nominal 1.5V.
PWR 3.3V power for the PLL core
Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
series resistor. No 50 ohm resistor to GND needed.
38 CPUC1_LPR
39 CPUT1_LPR
OUT
OUT
40 GNDCPU
PWR Ground pin for the CPU outputs
41 VDDIO_1.5
PWR Power supply for low power differential outputs, nominal 1.5V.
Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated
33ohm series resistor. No 50 ohm resistor to GND needed.
42 CPUC0_LPR
OUT
True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm
series resistor. No 50 ohm resistor to GND needed.
Stops all CPU clocks, except those set to be free running clocks
43 CPUT0_LPR
44 CPU_STOP#
OUT
IN
This 3.3V LVTTL input is a level sensitive strobe used to determine when latch inputs
are valid and are ready to be sampled. This is an active low input. / Asynchronous
active high input pin used to place the device into a power down state.
45 CLKPWRGD#/PD_3.3
IN
46 X2
47 X1
48 VDDREF_3.3
OUT Crystal output, Nominally 14.318MHz
IN Crystal input, Nominally 14.318MHz.
PWR Power pin for the XTAL and REF clocks, nominal 3.3V
IDTTM/ICSTM Ultra Mobile PC Clock for Embedded Applications
1617—08/19/09
3
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