DATASHEET
56-pin CK505 for Embedded Intel Systems
ICS9EPRS525
Recommended Application:
56-pin CK505 compatible clock, w/fully integrated Vreg and series Features/Benefits:
resistors on differential outputs for embedded applications
•
Supports spread spectrum modulation, 0 to -0.5% down
spread
Output Features:
•
•
Supports CPU clks up to 400MHz
Uses external 14.318MHz crystal, external crystal load
caps are required for frequency tuning
•
•
•
•
•
2 - CPU differential low power push-pull pairs
7 - SRC differential push-pull pairs
1 - CPU/SRC selectable differential low power push-pull pair
1 - SRC/DOT selectable differential low power push-pull pair
1 - SRC/SE selectable differential push-pull pair/Single-ended
outputs
Table 1: CPU Frequency Select Table
FSLC2 FSLB1 FSLA1
CPU
MHz
SRC
MHz
PCI
REF USB DOT
MHz MHz MHz MHz
B0b7
B0b6
B0b5
•
•
•
5 - PCI, 33MHz
1 - USB, 48MHz
1 - REF, 14.318MHz
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
266.66
133.33
200.00
166.66
333.33
100.00
400.00
100.00 33.33 14.318 48.00 96.00
Key Specifications:
•
•
•
•
•
CPU outputs cycle-cycle jitter < 85ps
SRC output cycle-cycle jitter < 125ps
PCI outputs cycle-cycle jitter < 250ps
+/- 100ppm frequency accuracy on all outputs
SRC outputs meet PCIe Gen2 when sourced from PLL3
Reserved
1. FSLA and FSLB are low-threshold inputs.Please see VIL_FS and VIH_FS specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
2. FSLC is a three-level input. Please see the VIL_FS and VIH_FS
specifications in the Input/Supply/Common Output Parameters Table for correct values.
Pin Configuration
PCI0/CR#_A 1
56 SCLK
VDDPCI 2
PCI1/CR#_B 3
PCI2/TME 4
55 SDATA
54 REF0/FSLC/TEST_SEL
53 VDDREF
PCI3/CFG0 5
52 X1
PCI4/SRC5_EN 6
PCI_F5/ITP_EN 7
GNDPCI 8
51 X2
50 GNDREF
49 FSLB/TEST_MODE
48 CK_PWRGD/PD#
47 VDDCPU
VDD48 9
USB_48MHz/FSLA 10
GND48 11
46 CPUT0_LRS
VDD96IO 12
45 CPUC0_LRS
DOTT_96_LRS/SRCT0_LRS 13
DOTC_96_LRS/SRCC0_LRS 14
GND 15
44 GNDCPU
43 CPUT1_F_LRS
42 CPUC1_F_LRS
41 VDDCPUIO
VDD 16
SRCT1_LRS/SE1 17
SRCC1_LRS/SE2 18
GND 19
40 NC
39 CPUT2_ITP_LRS/SRCT8_LRS
38 CPUC2_ITP_LRS/SRCC8_LRS
37 VDDSRCIO
VDDPLL3IO 20
SRCT2_LRS/SATAT_LRS 21
SRCC2_LRS/SATAC_LRS 22
GNDSRC 23
36 SRCT7_LRS/CR#_F
35 SRCC7_LRS/CR#_E
34 GNDSRC
SRCT3_LRS/CR#_C 24
SRCC3_LRS/CR#_D 25
VDDSRCIO 26
33 SRCT6_LRS
32 SRCC6_LRS
31 VDDSRC
SRCT4_LRS 27
SRCC4_LRS 28
30 PCI_STOP#/SRCT5_LRS
29 CPU_STOP#/SRCC5_LRS
56-TSSOP
IDTTM 56-pin CK505 for Embedded Intel Systems
1614B—01/21/10
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