5秒后页面跳转
9DBV0741AKILF PDF预览

9DBV0741AKILF

更新时间: 2022-02-26 11:02:17
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
17页 211K
描述
7-Output 1.8V HCSL Fanout Buffer with Zo=100ohms

9DBV0741AKILF 数据手册

 浏览型号9DBV0741AKILF的Datasheet PDF文件第2页浏览型号9DBV0741AKILF的Datasheet PDF文件第3页浏览型号9DBV0741AKILF的Datasheet PDF文件第4页浏览型号9DBV0741AKILF的Datasheet PDF文件第5页浏览型号9DBV0741AKILF的Datasheet PDF文件第6页浏览型号9DBV0741AKILF的Datasheet PDF文件第7页 
7-Output 1.8V HCSL Fanout Buffer with  
Zo=100ohms  
9DBV0741  
DATASHEET  
Description  
Features/Benefits  
100direct connect; saves 28 resistors and 48mm  
compared to standard HCSL  
2
The 9DBV0741 is a member of IDT's Full-Featured PCIe  
family. The device has 7 output enables for clock  
management, and 3 selectable SMBus addresses. It has  
integrated terminations for direct connection to 100  
transmission lines.  
41mW typical power consumption; eliminates thermal  
concerns  
Outputs can optionally be supplied from any voltage  
between 1.05V and 1.8V; maximum power savings  
Recommended Application  
PCIe Gen1–3 clock distribution in Storage, Networking,  
Compute, Consumer  
OE# pins; support DIF power management  
HCSL-compatible differential input; can be driven by  
common clock sources  
SMBus-selectable features allow optimization to customer  
Output Features  
7 1–200MHz Low-Power (LP) HCSL DIF pairs with  
ZO=100  
Easy AC-coupling to other logic families, see IDT  
application note AN-891  
requirements  
Slew rate for each output; allows tuning for various line  
lengths  
Differential output amplitude; allows tuning for various  
application environments  
Key Specifications  
Additive cycle-to-cycle jitter < 5ps  
Output-to-output skew < 60ps  
Additive phase jitter is < 100fs rms for PCIe Gen3  
1MHz to 200MHz operating frequency  
3.3V tolerant SMBus interface works with legacy controllers  
Selectable SMBus addresses; multiple devices can easily  
share an SMBus segment  
Device contains default configuration; SMBus interface not  
required for device operation  
Additive phase jitter < 300fs rms (12kHz–20MHz at  
125MHz)  
40-pin 5 x 5 mm VFQFPN; minimal board space  
Block Diagram  
vOE(6:0)#  
7
DIF6  
DIF5  
DIF4  
DIF3  
DIF2  
DIF1  
DIF0  
CLK_IN  
CLK_IN#  
vSADR  
^CKPWRGD_PD#  
SDATA_3.3  
CONTROL  
LOGIC  
SCLK_3.3  
9DBV0741 MARCH 10, 2017  
1
©2017 Integrated Device Technology, Inc.  

与9DBV0741AKILF相关器件

型号 品牌 描述 获取价格 数据表
9DBV0741AKILFT IDT 7-Output 1.8V HCSL Fanout Buffer with Zo=100ohms

获取价格

9DBV0741AKLF IDT 7-Output 1.8V HCSL Fanout Buffer with Zo=100ohms

获取价格

9DBV0741AKLFT IDT 7-Output 1.8V HCSL Fanout Buffer with Zo=100ohms

获取价格

9DBV0831 IDT 8-output 1.8V PCIe Gen1/2/3 Zero-Delay/Fan-out Buffer

获取价格

9DBV0831 RENESAS 8-Output 1.8V PCIe Zero-Delay/Fanout Clock Buffer

获取价格

9DBV0831_16 IDT 8-output 1.8V PCIe Gen1/2/3 Zero-Delay/Fan-out Buffer

获取价格