Document Number: MC34716
Rev. 8.0, 4/2016
NXP Semiconductors
Data sheet: Technical Data
1.0 MHz dual switch-mode DDR
power supply
34716
The 34716 is a highly integrated, space-efficient, low cost, dual synchronous
buck switching regulator with integrated N-channel power MOSFETs. It is a
high performance point-of-load (PoL) power supply with its second output
having the ability to track an external reference voltage. it provides a full power
supply solution for Double-Data-Rate (DDR) Memories.
DUAL SWITCH-MODE DDR POWER
SUPPLY
Channel one provides a source only, 5.0 A drive capability, while channel two
can sink and source up to 3.0 A. With its high current drive capability, channel
one can be used to supply the VDDQ to the memory chipset. The second
channel’s ability to track a reference voltage provides an ideal means of
supporting the termination voltage (VTT) required by modern data buses such
as Double-Data-Rate (DDR) memory buses, including, but not limited to DDR,
DDR2, DDR3 and Low power DDR3/DDR4 memories. Both channels are
highly efficient with tight output regulation. The 34716 also provides a buffered
output reference voltage (VREFOUT) to the memory chipset.
The 34716 SMARTMOS device offers a variety of control, supervisory and
protection functions that simplify the implementation of complex designs. It is
housed in a Pb-free, thermally enhanced and space efficient 26-pin exposed
pad QFN.
EP SUFFIX
98ASA00702D
26-PIN QFN
Features
• 50 m integrated N-channel power MOSFETs
• Input voltage operating range from 3.0 to 6.0 V
•
1% accurate output voltages, ranging from 0.6 to 3.6 V
• The second output tracks 1/2 an external reference voltage
1% accurate buffered reference output voltage
•
• Programmable switching frequency range from 200 kHz to 1.0 MHz
• Programmable soft start timing for channel one
• Over-current limit and short-circuit protection on both channels
• Thermal shutdown
• Output over-voltage and under-voltage detection
• Active low power good output signal
• Active low standby and shutdown inputs
.
34716
3.0 V to 6.0 V
V
IN
PVIN2
VIN
V
DDQ
VREFIN
BOOT2
PVIN1
BOOT1
V
DDQ
V
SW2
SW1
VOUT1
TT
VOUT2
Termination
Resistors
VDDQ
INV2
INV1
DDR Memory
Chipset
DDR Memory
Controller
Memory Bus
COMP1
PGND1
COMP2
VREFOUT
PGND2
VREF
V
VDDI
IN
FREQ
PG
MCU
STBY
SD
ILIM1
GND
Figure 1. Simplified application diagram
© 2016 NXP B.V.