Document Number: IMX6SXIEC
Rev. 4, 11/2018
NXP Semiconductors
Data Sheet: Technical Data
MCIMX6XxCxxxxxB
MCIMX6XxCxxxxxC
i.MX 6SoloX Applications
Processors for Industrial
Products
Package Information
Plastic Package
BGA 19 x 19 mm, 0.8 mm pitch
BGA 17 x 17 mm, 0.8 mm pitch
BGA 14 x 14 mm, 0.65 mm pitch
Ordering Information
See Table 1 on page 3
1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Special Signal Considerations. . . . . . . . . . . . . . . . 18
3.2 Recommended Connections for Unused Analog
Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . 20
4.2 Power Supplies Requirements and Restrictions . . 32
4.3 Integrated LDO Voltage Regulator Parameters . . 33
4.4 PLL Electrical Characteristics . . . . . . . . . . . . . . . . 35
4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . 36
4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 37
4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 42
4.8 Output Buffer Impedance Parameters. . . . . . . . . . 45
4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . 48
4.10 Multi-mode DDR Controller (MMDC). . . . . . . . . . . 60
4.11 General-Purpose Media Interface (GPMI) Timing. 61
4.12 External Peripheral Interface Parameters . . . . . . . 69
4.13 A/D Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 116
5.1 Boot Mode Configuration Pins. . . . . . . . . . . . . . . 116
5.2 Boot Device Interface Allocation . . . . . . . . . . . . . 118
Package Information and Contact Assignments. . . . . . 126
6.1 i.MX 6SoloX Signal Availability by Package . . . . 126
6.2 Signals with Different States During Reset and After
Reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
1 Introduction
The i.MX 6SoloX processors represent NXP
Semiconductor's latest achievement in integrated
multimedia-focused products offering high-performance
processing with a high degree of functional integration to
meet the demands of high-end, advanced industrial and
medical applications requiring graphically rich and
highly responsive user interfaces.
2
3
4
The i.MX 6SoloX processor features NXP’s advanced
®
®
implementation of the single Arm Cortex -A9 core,
which operates at speeds of up to 800 MHz, in addition
to the Arm Cortex-M4 core, which operates at speeds of
up to 227 MHz. This type of heterogeneous multicore
architecture provides greater levels of system
integration, smart low-power system awareness, and fast
real-time responsiveness. The i.MX 6SoloX includes a
GPU processor capable of supporting 2D and 3D
operations, a wide range of display and connectivity
options, and integrated power management. Each
processor provides a 32-bit
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6
6.3 19x19 mm Package Information . . . . . . . . . . . . . 129
6.4 17x17 mm Package Information . . . . . . . . . . . . . 148
6.5 14x14 mm Package Information . . . . . . . . . . . . . 183
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 199
DDR3/DDR3L/LPDDR2-800 memory interface and a
number of other interfaces for connecting peripherals,
such as WLAN, Bluetooth™, GPS, displays, and camera
sensors.
7
NXP Reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products
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