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935310896557 PDF预览

935310896557

更新时间: 2024-02-14 07:47:31
品牌 Logo 应用领域
恩智浦 - NXP 微控制器外围集成电路
页数 文件大小 规格书
66页 880K
描述
Microcontroller

935310896557 技术参数

生命周期:Active包装说明:,
Reach Compliance Code:unknown风险等级:5.68
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

935310896557 数据手册

 浏览型号935310896557的Datasheet PDF文件第2页浏览型号935310896557的Datasheet PDF文件第3页浏览型号935310896557的Datasheet PDF文件第4页浏览型号935310896557的Datasheet PDF文件第5页浏览型号935310896557的Datasheet PDF文件第6页浏览型号935310896557的Datasheet PDF文件第7页 
Freescale Semiconductor  
Data Sheet: Technical Data  
Document Number: MPC5668X  
Rev. 6, 03/2011  
MPC5668x  
MAPBGA–208  
MAPBGA–256  
17 mm x 17 mm  
17 mm x 17 mm  
MPC5668x Microcontroller  
Data Sheet  
MPC5668x features:  
• Cross-Triggering Unit (MPC5668E only)  
– Internal conversion triggering for ADC  
– Triggerable by internal timers or eMIOS200  
• Deserial Serial Peripheral Interface (DSPI)  
– Four individual DSPI modules  
• 32-bit CPU core complex (e200z650)  
– Compliant with Power Architecture embedded category  
– 32 KB unified cache with line locking and eight-entry  
store buffer16  
– Full duplex, synchronous transfers  
– Master or slave operation  
– Execution speed static to 116 MHz  
• 32-bit I/O processor (e200z0)  
– Execution speed static to 1/2 CPU core speed (58 MHz)  
• 2 MB on-chip flash  
2
• Inter-IC communication (I C) interface  
2
– Four individual I C modules  
– Multi-master operation  
• Serial Communication Interface (eSCI) module  
– Two-channel DMA interface  
– Supports read during program and erase operations, and  
multiple blocks allowing EEPROM emulation  
• 512 KB + 80 KB (592 KB) on-chip ECC SRAM  
(MPC5668G)  
– Configurable as LIN bus master  
• eMIOS200 timed input/output  
• 128 KB on-chip ECC SRAM (MPC5668E)  
• 16-entry Memory Protection Unit (MPC5668E only)  
• Direct memory access controller  
– 16-channel on MPC5668G  
– 32-channel on MPC5668E  
• Fast ethernet controller  
– 24 channels, 16-bit timers (MPC5668G)  
– 32 channels, 16-bit timers (MPC5668E)  
• Controller Area Network (FlexCAN) module  
– Compliant with CAN protocol specification, Version  
2.0B active  
– 64 mailboxes, each configurable as transmit or receive  
• Dual-channel FlexRay controller  
– Supports 10-Mbps and 100-Mbps IEEE 802.3 MII,  
10-Mbps 7-wire interface  
– Full implementation of FlexRay Protocol Specification  
2.1, RevA  
– IEEE 802.3 MAC (compliant with IEEE 802.3 1998  
edition)  
– 128 message buffers  
• Media Local Bus (MLB) interface (MPC5668G only)  
– Supports 16 logical channels, max speed 1024 Fs  
• Interrupt controller (INTC) supports 316 external interrupt  
vectors (22 are reserved)  
• JTAG controller (MPC5668G only)  
– Compliant with the IEEE 1149.1-2001  
• Nexus Development Interface (NDI)  
– Available in 256 MAPBGA package only  
– Compliant with IEEE-ISTO 5001-2003  
– Nexus class 3 development support on e200z650  
– Nexus class 2+ development support on e200z0  
• Internal voltage regulator allows operation from single  
3.3 V or 5 V supply  
• System clocks  
– Frequency-modulated phase-locked loop (FMPLL)  
– 4 – 40 MHz crystal oscillator (XTAL)  
– 32 kHz crystal oscillator (XTAL)  
– Dedicated 16 MHz and 128 kHz internal RC oscillators  
• Analog to Digital Converter (ADC) module  
– 10-bit A/D resolution  
– 32 external channels  
– 36 internal channels (MPC5668G)  
– 64 internal channels (MPC5668E)  
This document contains information on a product under development. Freescale reserves the  
right to change or discontinue this product without notice.  
© Freescale Semiconductor, Inc., 2010, 2011. All rights reserved.  

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