Table of Contents
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1
4.8 Low Voltage Characteristics . . . . . . . . . . . . . . . . . . . . 36
4.9 Oscillators Electrical Characteristics . . . . . . . . . . . . . . 36
4.10 FMPLL Electrical Characteristics. . . . . . . . . . . . . . . . . 38
4.11 ADC Electrical Characteristics. . . . . . . . . . . . . . . . . . . 39
4.12 Flash Memory Electrical Characteristics . . . . . . . . . . . 39
4.13 Pad AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . 40
4.14 AC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
4.14.1 Reset and Boot Configuration Pins . . . . . . . . . 43
4.14.2 External Interrupt (IRQ) and Non-Maskable
1.1 Orderable Parts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
MPC5668x Block Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
3.1 208-ball MAPBGA Pin Assignments. . . . . . . . . . . . . . . .6
3.2 256-ball MAPBGA Pin Assignments. . . . . . . . . . . . . . . .7
3.3 Pin Muxing and Reset States . . . . . . . . . . . . . . . . . . . . .8
3.3.1 Power and Ground Supply Summary . . . . . . . .25
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
4.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26
4.2 Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . .27
4.2.1 General Notes for Specifications at Maximum
2
3
4
Interrupt (NMI) Pins . . . . . . . . . . . . . . . . . . . . . 43
4.14.3 JTAG (IEEE 1149.1) Interface . . . . . . . . . . . . . 44
4.14.4 Nexus Debug Interface. . . . . . . . . . . . . . . . . . . 47
4.14.5 Enhanced Modular I/O Subsystem (eMIOS) . . 49
4.14.6 Deserial Serial Peripheral Interface (DSPI) . . . 50
4.14.7 MLB Interface. . . . . . . . . . . . . . . . . . . . . . . . . . 55
4.14.8 Fast Ethernet Interface . . . . . . . . . . . . . . . . . . 57
Package Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
5.1 Package Mechanical Data. . . . . . . . . . . . . . . . . . . . . . 61
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Junction Temperature . . . . . . . . . . . . . . . . . . . .27
4.3 ESD Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .30
4.4 VRC Electrical Specifications . . . . . . . . . . . . . . . . . . . .30
4.5 DC Electrical Specifications . . . . . . . . . . . . . . . . . . . . .30
4.6 Operating Current Specifications
. . . . . . . . . . . . . .32
5
6
4.7 I/O Pad Current Specifications . . . . . . . . . . . . . . . . . . .34
4.7.1 I/O Pad VDD33 Current Specifications . . . . . . . .35
Table 1. MPC5668G/MPC5668E Comparison
MPC5668G
Feature
MPC5668E
208 MAPBGA 256 MAPBGA
Package
208 MAPBGA
256 MAPBGA
RAM with ECC
592 KB
No
128 KB
16 entry
32-channel
No
MPU
DMA
16-channel
Ethernet (FEC)
MediaLB (MLB-DIM)
FlexRay
Yes
Yes
No
Yes (128 Message Buffers)
No
ADC (10-bit)
36 internal channels
64 internal channels
Supports 32 external channels
Supports 32 external channels
Total Timer I/O (eMIOS200)
Cross Trigger Unit (CTU)
SCI (eSCI)
24 channels, 16-bit
32 channels, 16-bit
No
6
Yes
12
4
SPI (DSPI)
4
CAN (FlexCAN)
I2C
6
5
4
4
Nexus3 Debug (e200Z6)
Nexus2+ Debug (e200Z0)
Supported on 256BGA
emulation package
Supported on 256BGA
emulation package
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MPC5668x Microcontroller Data Sheet, Rev. 6
2
Freescale Semiconductor
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