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935185560118

更新时间: 2024-11-25 19:02:11
品牌 Logo 应用领域
恩智浦 - NXP 驱动信息通信管理光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
6页 67K
描述
IC ABT SERIES, OCTAL 1-BIT DRIVER, TRUE OUTPUT, PDSO20, PLASTIC, TSSOP-20, Bus Driver/Transceiver

935185560118 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:PLASTIC, TSSOP-20
针数:20Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.3
系列:ABTJESD-30 代码:R-PDSO-G20
JESD-609代码:e4长度:6.5 mm
逻辑集成电路类型:BUS DRIVER湿度敏感等级:1
位数:1功能数量:8
端口数量:2端子数量:20
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):5.2 ns
认证状态:Not Qualified座面最大高度:1.1 mm
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:4.4 mm
Base Number Matches:1

935185560118 数据手册

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Philips Semiconductors  
Product specification  
Octal D-type flip-flop; positive-edge trigger  
(3-State)  
74ABT374A  
FEATURES  
8-bit positive edge triggered register  
DESCRIPTION  
The 74ABT374A high-performance BiCMOS device combines low  
static and dynamic power dissipation with high speed and high  
output drive.  
3-State output buffers  
Output capability: +64mA/–32mA  
Latch-up protection exceeds 500mA per Jedec Std 17  
The 74ABT374A is an 8-bit, edge triggered register coupled to eight  
3-State output buffers. The two sections of the device are controlled  
independently by the clock (CP) and Output Enable (OE) control  
gates.  
ESD protection exceeds 2000 V per MIL STD 883 Method 3015  
and 200 V per Machine Model  
The register is fully edge triggered. The state of each D input, one  
set-up time before the Low-to-High clock transition, is transferred to  
the corresponding flip-flop’s Q output.  
Power-up 3-State  
Power-up reset  
The 3-State output buffers are designed to drive heavily loaded  
3-State buses, MOS memories, or MOS microprocessors. The  
active-Low Output Enable (OE) controls all eight 3-State buffers  
independent of the clock operation.  
Live insertion/extraction permitted  
When OE is Low, the stored data appears at the outputs. When OE  
is High, the outputs are in the High-impedance “OFF” state, which  
means they will neither drive nor load the bus.  
QUICK REFERENCE DATA  
CONDITIONS  
= 25°C; GND = 0V  
SYMBOL  
PARAMETER  
TYPICAL  
UNIT  
T
amb  
t
t
Propagation delay  
CP to Qn  
3.4  
3.8  
PLH  
PHL  
C = 50pF; V = 5V  
ns  
L
CC  
C
Input capacitance  
Output capacitance  
Total supply current  
V = 0V or V  
CC  
4
7
pF  
pF  
µA  
IN  
I
C
Outputs disabled; V = 0V or V  
O CC  
OUT  
CCZ  
I
Outputs disabled; V =5.5V  
110  
CC  
ORDERING INFORMATION  
PACKAGES  
TEMPERATURE RANGE OUTSIDE NORTH AMERICA  
NORTH AMERICA  
74ABT374A N  
DWG NUMBER  
SOT146-1  
20-Pin Plastic DIP  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
–40°C to +85°C  
74ABT374A N  
74ABT374A D  
74ABT374A DB  
74ABT374A PW  
20-Pin plastic SO  
74ABT374A D  
SOT163-1  
20-Pin Plastic SSOP Type II  
20-Pin Plastic TSSOP Type I  
74ABT374A DB  
74ABT374APW DH  
SOT339-1  
SOT360-1  
PIN CONFIGURATION  
PIN DESCRIPTION  
PIN  
SYMBOL  
NUMBER  
FUNCTION  
1
OE  
Output enable input (active-Low)  
Data inputs  
20  
OE  
Q0  
D0  
D1  
Q1  
Q2  
D2  
D3  
Q3  
1
2
3
4
5
6
7
8
9
V
CC  
3, 4, 7, 8,  
13, 14, 17,  
18  
19 Q7  
18 D7  
17 D6  
16 Q6  
15 Q5  
14 D5  
13 D4  
12 Q4  
D0-D7  
2, 5, 6, 9,  
12, 15, 16,  
19  
Q0-Q7  
Data outputs  
11  
10  
20  
CP  
Clock pulse input (active rising edge)  
Ground (0V)  
GND  
V
CC  
Positive supply voltage  
GND 10  
11  
CP  
SA00110  
1
1995 Sep 06  
853-1448 15704  

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