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9334FMQB PDF预览

9334FMQB

更新时间： 2024-11-21 20:13:19
品牌 Logo 应用领域
德州仪器 - TI 输出元件逻辑集成电路触发器
页数 文件大小 规格书
6页 151K
描述
93 SERIES, LOW LEVEL TRIGGERED D LATCH, TRUE OUTPUT, CDFP16, CERAMIC, FP-16

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中文翻译

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9334FMQB 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：DFP, FL16,.3Reach Compliance Code：unknown
HTS代码：8542.39.00.01风险等级：5.77
其他特性：1:8 DMUX FOLLOWED BY LATCH; RESET ACTIVE ONLY WHEN LATCH ENABLE IS HIGH系列：93
JESD-30 代码：R-GDFP-F16JESD-609代码：e0
长度：9.6645 mm负载电容（CL）：15 pF
逻辑集成电路类型：D LATCH最大I（ol）：0.016 A
位数：1功能数量：1
端子数量：16最高工作温度：125 °C
最低工作温度：-55 °C输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DFP
封装等效代码：FL16,.3封装形状：RECTANGULAR
封装形式：FLATPACK峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V最大电源电流（ICC）：86 mA
Prop。Delay @ Nom-Sup：35 ns传播延迟（tpd）：27 ns
认证状态：Not Qualified筛选级别：38535Q/M;38534H;883B
座面最大高度：2.032 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：TTL温度等级：MILITARY
端子面层：Tin/Lead (Sn/Pb)端子形式：FLAT
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：LOW LEVEL
宽度：6.604 mmBase Number Matches：1

9334FMQB 数据手册

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June 1989  
9334/DM9334 8-Bit Addressable Latch  
General Description  
The DM9334 is a high speed 8-bit Addressable Latch de-  
signed for general purpose storage applications in digital  
systems. It is a multifunctional device capable of storing sin-  
gle line data in eight addressable latches, and being a one-  
of-eight decoder and demultiplexer with active level high  
outputs. The device also incorporates an active level low  
common clear for resetting all latches, as well as an active  
level low enable.  
When operating the device as an addressable latch, chang-  
ing more than one bit of the address could impose a tran-  
sient wrong address. Therefore, this should only be done  
while in the memory mode.  
The function tables summarize the operation of the product.  
Features  
Y
Common clear  
The DM9334 has four modes of operation which are shown  
in the mode selection table. In the addressable latch mode,  
data on the data line (D) is written into the addressed latch.  
The addressed latch will follow the data input with all non-  
addressed latches remaining in their previous states. In the  
memory mode, all latches remain in their previous state and  
are unaffected by the data or address inputs.  
Y
Easily expandable  
Y
Random (addressable) data entry  
Y
Serial to parallel capability  
Y
8 bits of storage/output of each bit available  
Y
Active high demultiplexing/decoding capability  
Y
Alternate Military/Aerospace device (9334) is available.  
Contact a National Semiconductor Sales Office/Distrib-  
utor for specifications.  
In the one-of-eight decoding or demultiplexing mode, the  
addressed output will follow the state of the D input with all  
other inputs in the low state. In the clear mode all outputs  
are low and unaffected by the address and data inputs.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6609–1  
Order Number 9334DMQB, 9334FMQB, DM9334J or DM9334N  
See NS Package Number J16A, N16E or W16A  
C
1995 National Semiconductor Corporation  
TL/F/6609  
RRD-B30M105/Printed in U. S. A.  
123456

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