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9250F-18LF PDF预览

9250F-18LF

更新时间: 2024-02-16 21:07:03
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管
页数 文件大小 规格书
16页 311K
描述
Clock Generator, PDSO56

9250F-18LF 技术参数

是否Rohs认证: 符合生命周期:Obsolete
包装说明:SSOP, SSOP56,.4Reach Compliance Code:compliant
风险等级:5.84JESD-30 代码:R-PDSO-G56
JESD-609代码:e3湿度敏感等级:1
端子数量:56最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP56,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
电源:2.5,3.3 V认证状态:Not Qualified
子类别:Clock Generators表面贴装:YES
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUALBase Number Matches:1

9250F-18LF 数据手册

 浏览型号9250F-18LF的Datasheet PDF文件第2页浏览型号9250F-18LF的Datasheet PDF文件第3页浏览型号9250F-18LF的Datasheet PDF文件第4页浏览型号9250F-18LF的Datasheet PDF文件第5页浏览型号9250F-18LF的Datasheet PDF文件第6页浏览型号9250F-18LF的Datasheet PDF文件第7页 
Integrated  
Circuit  
Systems, Inc.  
ICS9250-18  
Frequency Generator & Integrated Buffers for Celeron & PII/III™  
Recommended Application:  
Pin Configuration  
BX, Appollo Pro 133 type of chip set.  
VDDREF  
*FS2/REF1  
*PCI_STOP#/REF0  
GND  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
56  
VDDLIOAPIC  
IOAPIC0  
IOAPIC_F  
GND  
CPUCLK_F  
CPUCLK1  
VDDLCPU  
CPUCLK2  
GND  
CPU_STOP#  
SDRAM_F  
VDDSDR  
SDRAM0  
SDRAM1  
GND  
SDRAM2  
SDRAM3  
SDRAM4  
SDRAM5  
VDDSDR  
SDRAM6  
SDRAM7  
GND  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
Output Features:  
X1  
X2  
VDDPCI  
3 - CPUs @2.5V, up to 166MHz.  
17 - SDRAM @ 3.3V, up to 166MHz.  
7 - PCI @3.3V  
2 - IOAPIC @ 2.5V  
1 - 48MHz, @3.3V fixed.  
1 - 24MHz @ 3.3V  
*MODE/PCICLK_F  
*FS3/PCICLK0  
GND  
PCICLK1  
PCICLK2  
PCICLK3  
PCICLK4  
VDDPCI  
PCICLK5  
BUFFERIN  
SDRAM11  
SDRAM10  
VDDSDR  
SDRAM9  
SDRAM8  
GND  
2 - REF @3.3V, 14.318MHz.  
Features:  
Up to 166MHz frequency support  
Support power management: CPU, PCI, stop and  
Power down Mode form I2C programming.  
Spread spectrum for EMI control ( 0.25ꢀ center  
spread)  
Uses external 14.318MHz crystal  
SDRAM15  
SDRAM14  
GND  
SDRAM12  
SDRAM13  
VDD48  
24MHz/FS0*  
48MHz/FSI*1  
SDATA  
SCLK  
I2C  
{
Key Specifications:  
CPU – CPU: <175ps  
CPU – PCI: 1 - 4ns  
PCI – PCI: <500ps  
56-Pin SSOP  
* Internal Pull-up Resistor of 240K to 3.3V on indicated inputs  
** Internal Pull-down resistor of 240K to GND on indicated  
inputs. 1. This output is double strength.  
SDRAM - SDRAM: <250ps  
Block Diagram  
Functionality  
CPU  
(MHz)  
80.00  
75.00  
83.31  
PCICLK  
(MHz)  
40.00  
37.50  
41.65  
33.45  
34.33  
37.34  
34.01  
33.57  
40.00  
38.33  
36.66  
35.00  
35.00  
37.50  
31.00  
33.25  
FS3  
FS2  
FS1  
FS0  
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
66.9  
103.00  
112.01  
68.01  
100.7  
120.00  
114.99  
109.99  
105.00  
140.00  
150.00  
124.00  
133.9  
0387C—09/08/05  
ICS reserves the right to make changes in the device data identified in  
this publication without further notice. ICS advises its customers to  
obtain the latest version of all device data to verify that any  
information being relied upon by the customer is current and accurate.  

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