Datasheet > 9248YG-50

9248YG-50

更新时间： 2024-11-27 20:01:23

品牌	Logo	应用领域
艾迪悌 - IDT		时钟光电二极管外围集成电路晶体
页数	文件大小	规格书
13页	618K
描述
Processor Specific Clock Generator, 100MHz, CMOS, PDSO28, 6.10 MM, TSSOP-28

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9248YG-50 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	SSOP
包装说明：	6.10 MM, TSSOP-28	针数：	28
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.79
其他特性：	IT CAN ALSO OPERATE AT 3.3V SUPPLY	JESD-30 代码：	R-PDSO-G28
JESD-609代码：	e0	长度：	9.7 mm
端子数量：	28	最高工作温度：	70 °C
最低工作温度：		最大输出时钟频率：	100 MHz
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：	225	主时钟/晶体标称频率：	14.318 MHz
座面最大高度：	1.1 mm	最大供电电压：	2.625 V
最小供电电压：	2.375 V	标称供电电压：	2.5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	TIN LEAD
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	20
宽度：	6.1 mm	uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches：	1

9248YG-50 数据手册

Integrated

Circuit

Systems, Inc.

ICS9248-50

Frequency Timing Generator for Pentium II Systems

General Description

Features

Generates the following system clocks:

The ICS9248-50 is the Main clock solution for Notebook

designs using the Intel 440BX style chipset. Along with an

SDRAM buffer such as the ICS9179-03, it provides all

necessary clock signals for such a system.

-2CPU(2.5V)upto100MHz.

- 6 PCI(3.3V) @ 33.3MHz (Includes one free running).

-2REFclks(3.3V)at14.318MHz.

Skew characteristics:

Spread spectrum may be enabled by driving pin 26, SPREAD#

active (Low) at power-on. Spread spectrum typically reduces

system EMI by 8dB to 10dB. This simplifies EMI qualification

without resorting to board design iterations or costly shielding.

The ICS9248-50 employs a proprietary closed loop design,

which tightly controls the percentage of spreading over

process and temperature variations.

-CPUCPU<175ps

- PCI PCI < 500ps

- CPU(early) PCI = 1.5ns 4ns.

Supports Spread Spectrum modulation for CPU and PCI

clocks, 0.5% down spread

Efficient Power management scheme through stop clocks

and power down modes.

Uses external 14.318MHz crystal, no external load cap

required for CL=18pF crystal.

28-pin(209mil)SSOPand(6.1mm)TSSOPpackage

Block Diagram

Pin Configuration

28-Pin SSOP & TSSOP

Power Groups

VDD,GND=PLLcore

VDDREF,GNDREF=REF(0:1),X1,X2

VDDPCI,GNDPCI=PCICLK_F,PCICLK(0:4)

VDD48,GND48=48MHz,48/24MHz

Pentium is a trademark on Intel Corporation.

ICS reserves the right to make changes in the device data identified in

this publication without further notice. ICS advises its customers to

obtain the latest version of all device data to verify that any

9248-50 Rev - E 6/3/99

information being relied upon by the customer is current and accurate.

12 3 4 5 6 7...13

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与9248YG-50相关器件

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9248YG-56-T	IDT	获取价格	Processor Specific Clock Generator, 100MHz, CMOS, PDSO28, 4.40 MM, 0.65 MM PITCH, TSSOP-28
9248YG-92GLFT	IDT	获取价格	Processor Specific Clock Generator, 48MHz, PDSO48, 6.10 MM, 0.50 MM PITCH, ROHS COMPLIANT,
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924CE18S3	HONEYWELL	获取价格	Safety Door Switch, SPST, Momentary, Screw Terminal, Panel Mount
924CE18S3A	HONEYWELL	获取价格	Safety Door Switch, SPST, Momentary, Screw Terminal, Panel Mount
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