Datasheet > 8T79S838-08NLGI8

8T79S838-08NLGI8

更新时间： 2024-12-01 01:19:03

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
25页	418K
描述
1-to-8 Differential to Universal Output Fanout Buffer

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8T79S838-08NLGI8 数据手册

1-to-8 Differential to Universal Output

Fanout Buffer

IDT8T79S838-08I

DATA SHEET

General Description

Features

The IDT8T79S838-08I is a high performance, 1-to-8, differential input

to universal output fanout buffer. The device is designed for signal

fanout of high-frequency clock signals in applications requiring output

frequencies generated simultaneously. The IDT8T79S838-08I is

optimized for 3.3V and 2.5V supply voltages and a temperature range

of -40°C to 85°C. The device is packaged in a space-saving 32 lead

VFQFN package.

• Four banks of two output pairs

• Individual output type control, LVDS or LVPECL, via 

serial interface

• Individual outputs remain enabled while serial loading new 

device configurations

• One differential PCLK, nPCLK input

• PCLK, nPCLK input pair can accept the following differential input

levels: LVPECL, LVDS levels

• Maximum input frequency: 1.5GHz

• LVCMOS control inputs

• Individual output enable/disable control via serial interface

• 2.375V to 3.465V supply voltage operation

• -40°C to 85°C ambient operating temperature

• Lead-free (RoHS 6) packaging

Pin Assignment

Block Diagram

QA0

nQA0

VCC

V_CC25

V_EE26

16 V_CC

QA1

15 V_EE

nQA1

Pulldown

PCLK

IDT8T79S838-08I

Pullup / Pulldown

nQA1 27

QA1 28

nQA0 29

QA0 30

V_CC31

14 QD0

13 nQD0

12 QD1

11 nQD1

10 V_CC

nPCLK

QB0

32 lead VFQFN

5mm x 5mm x 0.925mm

Pad size 3.15mm x 3.15mm

NL package

nQB0

VEE

QB1

nQB1

Top View

QC0

SDATA 32

PWR_SEL

nQC0

Pulldown

PWR_SEL

QC1

nQC1

VEE

QD0

nQD0

QD1

nQD1

Pulldown

Output Type and

Output Enable

logic

Pulldown

SCLK

SDATA

MISO

VEE VEE VEE VEE

IDT8T79S838-08NLGI REVISION A JANUARY 29, 2014

12 3 4 5 6 7...25

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