Datasheet > 8N3QV01KG-0045CDI8

8N3QV01KG-0045CDI8

更新时间： 2024-11-24 18:49:03

品牌	Logo	应用领域
艾迪悌 - IDT		振荡器
页数	文件大小	规格书
23页	209K
描述
LVPECL Output Clock Oscillator

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8N3QV01KG-0045CDI8 技术参数

生命周期：	Active	Reach Compliance Code：	compliant
风险等级：	5.55	振荡器类型：	LVPECL
Base Number Matches：	1

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Quad-Frequency Programmable

VCXO

IDT8N3QV01 Rev G

DATA SHEET

General Description

Features

The IDT8N3QV01 is a Quad-Frequency Programmable VCXO with

very flexible frequency and pull-range programming capabilities.

The device uses IDT’s fourth generation FemtoClock® NG

technology for an optimum of high clock frequency and low phase

noise performance. The device accepts 2.5V or 3.3V supply and is

packaged in a small, lead-free (RoHS 6) 10-lead Ceramic 5mm x

7mm x 1.55mm package.

• Fourth generation FemtoClock® NG technology

• Programmable clock output frequency from 15.476MHz to

866.67MHz and from 975MHz to 1,300MHz

• Four power-up default frequencies (see part number order

codes), reprogrammable by I²C

• I²C programming interface for the output clock frequency, APR

and internal PLL control registers

Besides the 4 default power-up frequencies set by the FSEL0 and

FSEL1 pins, the IDT8N3QV01 can be programmed via the I²C

interface to any output clock frequency between 15.476MHz to

866.67MHz and from 975MHz to 1,300MHz to a very high degree of

precision with a frequency step size of 435.9Hz ÷N (N is the PLL

output divider). Since the FSEL0 and FSEL1 pins are mapped to 4

independent PLL M and N divider registers (P, MINT, MFRAC and

N), reprogramming those registers to other frequencies under

control of FSEL0 and FSEL1 is supported. The extended

• Frequency programming resolution is 435.9Hz ÷N

• Absolute pull-range (APR) programmable from ±4.5 to

±754.5ppm

• One 2.5V or 3.3V LVPECL differential clock output

• Two control inputs for the power-up default frequency

• LVCMOS/LVTTL compatible control inputs

• RMS phase jitter @ 156.25MHz (12kHz - 20MHz): 

0.487ps (typical)

temperature range supports wireless infrastructure, tele-

communication and networking end equipment requirements. The

device is a member of the high-performance clock family from IDT.

• RMS phase jitter @ 156.25MHz (1kHz - 40MHz): 

0.614ps (typical)

• 2.5V or 3.3V supply voltage modes

• -40°C to 85°C ambient operating temperature

• Available in Lead-free (RoHS 6) package

Block Diagram

Pin Assignment

PFD

LPF

FemtoClock® NG

VCO

1950-2600MHz

Q

÷P

OSC

÷N

VCC

114.285 MHz

V^EE

÷MINT, MFRAC

A/D

IDT8N3QV01 Rev G

10-lead Ceramic 5mm x 7mm x 1.55mm

package body

Pulldown

FSEL1

FSEL0

Configuration Register (ROM)

(Frequency, APR, Polarity)

CD Package

Top View

Pullup

SCLK

SDATA

I²C Control

Pullup

IDT8N3QV01GCD REVISION A MARCH 6, 2012

12 3 4 5 6 7...23

中文翻译

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