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88H2785 PDF预览

88H2785

更新时间: 2024-01-25 01:11:27
品牌 Logo 应用领域
国际商业机器公司 - IBM 局域网数据传输PC外围集成电路
页数 文件大小 规格书
2页 145K
描述
LAN Controller, 0 Channel(s), 50MBps, CMOS, PQFP144, 20 X 20 MM, LQFP-144

88H2785 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:LFQFP,针数:144
Reach Compliance Code:unknownHTS代码:8542.31.00.01
风险等级:5.74地址总线宽度:32
边界扫描:NO总线兼容性:PCI
数据编码/解码方法:NRZ最大数据传输速率:50 MBps
外部数据总线宽度:8JESD-30 代码:S-PQFP-G144
长度:20 mm低功率模式:NO
串行 I/O 数:端子数量:144
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
认证状态:Not Qualified座面最大高度:1.7 mm
标称供电电压:3.3 V表面贴装:YES
技术:CMOS端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:20 mmuPs/uCs/外围集成电路类型:SERIAL IO/COMMUNICATION CONTROLLER, LAN
Base Number Matches:1

88H2785 数据手册

 浏览型号88H2785的Datasheet PDF文件第2页 
IBMMicroelectronics  
1394 Host Link Layer Controller  
Enables IEEE 1394 standard PCI performance  
Product Overview  
tional channels for isochronous receive/  
transmit.  
Highlights  
The IBM 21S650PFAis a high perfor-  
mance IEEE1394 Link Layer Controller  
with a PCIsystem interface.It is capable  
of operating as a PCI master or slave and  
supports long burst PCI transactions at  
up to 33MHz.Its physical layer interface  
supports data rates of100 Mbit/s,200  
Mbit/s and 400 Mbit/s.Furthermore,a  
DMA engine is incorporated to minimize  
CPU intervention during packet transmis-  
sion and reception.  
• FullyIEEE1394-1995compatible  
AsynchronousTransmission  
The IBM 21S650PFAcan transmit and  
receive all of the defined1394 packet  
formats.Packets to be transmitted are read  
from host memory and received packets  
are written to host memory using DMA.To  
avoiddeadlockconditions,twoDMA  
contexts are used; one for request packets  
andoneforresponsepackets. In addition,  
the link supports automatic retry of packet  
transmission following the reception of a  
‘busyacknowledge.’  
• Four bidirectional (transmit/receive)  
isochronous DMA contexts  
• Supports up to 63 isochronous channels  
in transmit operation  
• Uses Descriptor Based DMA(DB-DMA)  
context structure  
In addition,an interface to an external  
configurationROMisprovided,allowing  
system designers to store 1394 and PCI  
configurationinformation.TheIBM  
21S650PFAalsohasfeaturestosupportthe  
transactionandbusmanagementlayers.  
Figure1describesatypicalsystemthat  
usestheIBM1394LinkController.ThePHY  
chiphandlesthephysical layer protocol  
and interface to the1394 serial bus cables.  
Two asynchronous DMA contexts for  
transmit  
• One asynchronous DMAcontext for  
inbound packets  
All received packets,with the exception of  
self-ID packets,are directed to the  
General Receive context.In compliance  
with the OHCI specification,self-ID  
packets,which are received during the  
self-identification phase of bus initializa-  
tion,are automatically routed to a single  
designated host memory buffer.Each  
time bus initialization occurs,the new self-  
• Self-ID packets automatically routed to a  
single designated host memory buffer  
• Programmable1K byte transmit FIFO and  
1K byte receive FIFO  
DMAEngine  
• Data rates: S100,S200,S400 Mb/s  
The IBM 21S650PFA incorporates a DMA  
engine to fetch packets from the system  
memory and transmit them to the1394  
bus,and to write received packets to the  
system memory.The industry standard  
Descriptor Based DMA(DB-DMA)  
structure is used.Each asynchronousand  
isochronous context is comprised of a  
buffer descriptor list called a DMAcontext  
program,stored in main memory.Buffers  
are specified within the DMAcontext  
program by DMA descriptors.  
• SupportsIsolation Barrierand IBMs  
‘DynamicTerminationmodes on the  
PHY/Link interface  
CPU  
Host  
DRAM  
Bridge  
PCI Bus  
PCI  
• Cycle Master capable  
1394 Link  
Component  
Layer  
• External configuration ROM interface  
Controller  
• PCI2.1interface  
PHY  
Supports cache line commands  
(memory write & invalidate,memory  
read line, memory read multiple)  
Supports long burst PCI transactions  
No wait states  
1394 Bus  
1394 Bus  
1394  
Device  
1394  
Device  
1394  
Device  
1394  
Device  
IBM's Link supports seven DMA contexts;  
two for asynchronous transmit,one for  
asynchronousreceive and four bidirec-  
Figure 1  

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