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854S712 PDF预览

854S712

更新时间: 2024-02-03 14:21:16
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
17页 457K
描述
1:2 Fanout Buffer with Pre-Emphasis

854S712 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:VFQFPN
包装说明:HVQCCN, LCC16,.12SQ,20针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.74
Samacsys Description:VFQFN- N 3 X 3 X 1.0 MM - NO LEAD系列:854S
输入调节:DIFFERENTIALJESD-30 代码:S-XQCC-N16
JESD-609代码:e3长度:3 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:3
功能数量:1反相输出次数:
端子数量:16实输出次数:2
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装等效代码:LCC16,.12SQ,20封装形状:SQUARE
封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 VProp。Delay @ Nom-Sup:0.5 ns
传播延迟(tpd):0.5 ns认证状态:Not Qualified
Same Edge Skew-Max(tskwd):0.01 ns座面最大高度:1 mm
子类别:Clock Drivers最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Matte Tin (Sn)端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
处于峰值回流温度下的最长时间:30宽度:3 mm
最小 fmax:3000 MHzBase Number Matches:1

854S712 数据手册

 浏览型号854S712的Datasheet PDF文件第1页浏览型号854S712的Datasheet PDF文件第3页浏览型号854S712的Datasheet PDF文件第4页浏览型号854S712的Datasheet PDF文件第5页浏览型号854S712的Datasheet PDF文件第6页浏览型号854S712的Datasheet PDF文件第7页 
854S712 Datasheet  
Pin Description and Pin Characteristic Tables  
Table 1 Pin Description  
Number  
Name  
Type  
Description  
Non-inverting differential data and clock input. LVDS, LVPECL or CML interface  
levels. 50to VTT.  
1
IN  
Input  
Input  
Input  
Inverting differential data and clock input. LVDS, LVPECL or CML interface levels.  
50to VTT.  
4
nIN  
nOE0,  
nOE1  
6, 7  
Pulldown  
Pulldown  
Output enable control. LVCMOS/LVTTL interface levels.  
15, 14  
12, 11  
10, 9  
3
PE0, PE1  
Q0, nQ0  
Q1, nQ1  
VREF_AC  
Input  
Pre-emphasis control. LVCMOS/LVTTL interface levels.  
Differential output pair. LVDS interface levels.  
Differential output pair. LVDS interface levels.  
Bias voltage reference for AC-coupling.  
Output  
Output  
Output  
Center tap for input termination. Leave floating for LVDS input, connect to 50to GND  
for LVPECL inputs and to the VREF_AC output for AC-coupled applications.  
2
VTT  
5, 16  
8, 13  
GND  
VDD  
Power  
Power  
Power supply ground.  
Power supply pins.  
NOTE: Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.  
Table 2. Pin Characteristics  
Symbol  
Parameter  
Test Conditions  
Minimum  
Typical  
Maximum  
Units  
pF  
CIN  
Input Capacitance  
2
RPULLDOWN Input Pulldown Resistor  
51  
k  
©2017 Integrated Device Technology, Inc.  
2
October 10, 2017  

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