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853S314AFILF PDF预览

853S314AFILF

更新时间: 2024-02-06 06:25:21
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
16页 177K
描述
Low Skew Clock Driver, 853S Series, 4 True Output(s), 0 Inverted Output(s), PDSO20, 5.30 MM X 7.20 MM, 1.75 M HEIGHT, ROHS COMPLIANT, MO-150, SSOP-20

853S314AFILF 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SSOP
包装说明:5.30 MM X 7.20 MM, 1.75 M HEIGHT, ROHS COMPLIANT, MO-150, SSOP-20针数:20
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
其他特性:IT ALSO OPERATE ON 3.3V SUPPLY系列:853S
输入调节:DIFFERENTIAL MUXJESD-30 代码:R-PDSO-G20
JESD-609代码:e3长度:7.2 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER湿度敏感等级:1
功能数量:1反相输出次数:
端子数量:20实输出次数:4
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装等效代码:SSOP20,.3封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:2.5/3.3 V传播延迟(tpd):0.65 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.05 ns
座面最大高度:2 mm子类别:Clock Drivers
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
温度等级:INDUSTRIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:5.3 mm最小 fmax:2700 MHz
Base Number Matches:1

853S314AFILF 数据手册

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ICS853S314I Data Sheet  
LOW SKEW, 1-TO4 DIFFERENTIAL-TO2.5V, 3.3V LVPECL/ECL FANOUT BUFFER  
ABSOLUTE MAXIMUM RATINGS  
Supply Voltage, VCC  
3.9V (LVPECL mode, VEE = 0V)  
NOTE: Stresses beyond those listed under Absolute  
Maximum Ratings may cause permanent damage to the de-  
vice.These ratings are stress specifications only. Functional op-  
eration of product at these conditions or any conditions beyond  
those listed in the DC Characteristics or AC Characteristics is  
not implied. Exposure to absolute maximum rating conditions  
for extended periods may affect product reliability.  
Negative Supply Voltage, VEE  
Inputs, VI (LVPECL mode)  
Inputs, VI (ECL mode)  
-3.9V (ECL mode, VCC = 0V)  
-0.3V to VCC + 0.3 V  
0.3V to VEE - 0.3V  
Outputs, IO  
Continuous Current  
50mA  
Package Thermal Impedance, θ  
JA  
20 Lead SSOP  
80.8°C/W (0 lfpm)  
73.2°C/W (0 lfpm)  
20 Lead TSSOP  
Storage Temperature, T  
-65°C to 150°C  
STG  
TABLE 4A. LVPECL/HSTL DC CHARACTERISTICS, VCC = 2.5V 5ꢀ OR 3.3V 5ꢀ, VEE = 0V, TA = -40°C TO 85°C  
Symbol Parameter  
Test Conditions  
Minimum  
Typical  
Maximum Units  
Control Input CLK_SEL  
VIL  
VIH  
IIN  
Input Low Voltage  
VCC -1.810  
VCC -1.165  
VCC -1.475  
VCC -0.880  
100  
V
V
Input High Voltage  
Input Current  
VIN = VIL or VIN = VIH  
µA  
Clock Input Pair CLKA, nCLKA (LVPECL differential signals)  
VPP  
VCMR  
IIN  
Peak-to-Peak Input Voltage; NOTE 1  
Common Mode Input Voltage; NOTE 2  
Input Current  
0.1  
1.0  
1.3  
VCC -0.3  
100  
V
V
VIN = VIL or VIN = VIH  
µA  
Clock Input Pair CLKB, nCLKB (HSTL differential signals)  
VCC = 3.3V  
CC = 2.5V  
0.4  
0.4  
0
V
V
VDIF  
Differential Input Voltage; NOTE 3  
V
VX  
IIN  
Differential Crosspoint Voltage; NOTE 4  
Input Current  
0.68 - 0.9  
VCC -1.0  
200  
V
VIN = VX 0.2V  
µA  
LVPECL Clock Outputs (Q0:Q3, nQ0:nQ3)  
VOH  
Output High Voltage  
VCC -1.2  
VCC -1.9  
VCC -1.9  
VCC -1.005  
VCC -1.705  
VCC -1.705  
VCC -0.7  
VCC -1.5  
VCC -1.3  
V
V
V
VCC = 3.3V 5ꢀ  
VOL  
Output Low Voltage  
V
CC = 2.5V 5ꢀ  
Supply Current  
Maximum Quiescent Supply Current  
without Output Termination Current  
NOTE 1: VPP is the minimum differential input voltage swing required to maintain device functionality.  
IEE  
92  
mA  
NOTE 2: VCMR is the crosspoint of the differential input signal. Functional operation is obtained when the crosspoint is within  
the VCMR range and the input swing lies within the VPP specification.  
NOTE 3: VDIF is the minimum differential HSTL input voltage swing required for device functionality.  
NOTE 4: VX is the crosspoint of the differential HSTL input signal. Functional operation is obtained when the crosspoint is  
within the VX range and the input swing lies within the VPP specification.  
ICS853S314AFI REVISION B OCTOBER 4, 2013  
3
©2013 Integrated Device Technology, Inc.  

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