Dual 2:1, 1:2 Differential-to-LVPECL/
ECL Multiplexer
853S54I-01
Datasheet
General Description
Features
The 853S54I-01 is a 2:1/1:2 Multiplexer. The 2:1 Multiplexer
allows one of 2 inputs to be selected onto one output pin and the
1:2 MUX switches one input to one of two outputs. This device
may be useful for multiplexing multi-rate Ethernet PHYs which
have 100Mbit and 1000Mbit transmit/receive pairs onto an optical
SFP module which has a single transmit/receive pair. A 3RD mode
allows loop back testing and allows the output of a PHY transmit
pair to be routed to the PHY input pair. For examples, please refer
to the Application Block diagrams on pages 2-3 of the data sheet.
• Dual 2:1, 1:2 MUX
• Three LVPECL output pairs
• Three differential clock inputs can accept: LVPECL, LVDS, CML
• Loopback test mode available
• Maximum output frequency: 2.5GHz
• Propagation delay: 550ps (maximum)
• Part-to-part skew: 275ps (maximum)
The 853S54I-01 is optimized for applications requiring very high
performance and has a maximum operating frequency in 2.5GHz.
The device is packaged in a small, 3mm x 3mm VFQFN package,
making it ideal for use on space-constrained boards.
• Additive phase jitter, RMS: 27fs (typical)
• LVPECL mode operating voltage supply range:
V
CC = 2.375V to 3.465V, VEE = 0V
• ECL mode operating voltage supply range:
CC = 0V, VEE = -3.465V to -2.375V
V
• -40°C to 85°C ambient operating temperature
• Available in lead-free (RoHS 6) package
Pin Assignment
Block Diagram
SELB
16 15 14 13
1
2
3
12
QA0
nQA0
QA1
INA0
Pulldown
11
10
nINA0
INA1
INA0
Pullup/Pulldown
nINA0
nQA1
4
nINA1
9
5
6
7
8
Pulldown
INB
LOOP 0
0
Pullup/Pulldown
nINB
QA0
nQA0
853S54I-01
1
16-Lead VFQFN
0
QB
3mm x 3mm x 0.925mm
package body
K Package
Pulldown
INA1
nQB
1
Pullup/Pulldown
nINA1
Top View
LOOP 1
QA1
nQA1
SELA
©2017 Integrated Device Technology, Inc.
1
March 2, 2017