Datasheet > 85311I

85311I

更新时间： 2024-01-24 01:11:05

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
17页	315K
描述
Low Skew, 1-to-2 , Different ial-to-2.5V, 3.3V LVPECL/ ECL Fanout Buffer

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85311I 数据手册

Low Skew , 1-to-2, Differential-to-2.5V, 3.3V

LVPECL/ ECL Fanout Buffer

85311I

Datasheet

General Description

Features

The 85311I is a low skew, high performance 1-to-2

• Two differential 2.5V/3.3V LVPECL / ECL outputs

• One CLK, nCLK input pair

Differential-to-2.5V/3.3V ECL/LVPECL Fanout Buffer. The CLK,

nCLK pair can accept most standard differential input levels.The

85311I is characterized to operate from either a 2.5V or a 3.3V

power supply. Guaranteed output and part-to-part skew

• CLK, nCLK pair can accept the following differential input levels:

LVDS, LVPECL, LVHSTL, SSTL, HCSL

• Maximum output frequency: 1GHz

characteristics make the 85311I ideal for those clock distribution

applications demanding well defined performance and repeatability.

• Translates any single ended input signal to 3.3V LVPECL levels

with resistor bias on nCLK input

• Output skew: 20ps (maximum)

• Part-to-part skew: 350ps (maximum)

• Propagation delay: 2.1ns (maximum)

• Additive phase jitter, RMS: 0.14ps (typical), 3.3V

• LVPECL mode operating voltage supply range: 

V_CC= 2.375V to 3.465V, V_EE= 0V

• ECL mode operating voltage supply range:

V_CC= 0V, V_EE= -2.375V to -3.465V

• -40°C to 85°C ambient operating temperature

• Available in lead-free (RoHS 6) package

Block Diagram

Pin Assignment

nQ0

VCC

Pulldown

Pullup

CLK

nCLK

V^EE

nCLK

nQ1

85311I

8-Lead SOIC

3.90mm x 4.903mm x 1.37mm package body

M Package

Top View

Revision B, February 18, 2016

12 3 4 5 6 7...17

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