Datasheet > 84C84X

84C84X

更新时间： 2022-11-26 05:31:39

品牌	Logo	应用领域
恩智浦 - NXP		微控制器
页数	文件大小	规格书
38页	267K
描述
8-bit microcontrollers with OSD and VST

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数据手册

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84C84X 数据手册

Philips Semiconductors

Product speciﬁcation

8-bit microcontrollers with OSD and VST

84C44X; 84C64X; 84C84X

ANALOG CONTROL

6-bit PWM DACs

8.1.3

ANALOG OUTPUT VOLTAGE

A DC voltage proportional to the PWM control setting may

be obtained by connecting an integrating network to each

of the PWM outputs (see Fig.9).

8.1

Five PWM outputs are available for analog control

purposes e.g. volume, balance, brightness, saturation etc.

The block diagram of a typical 6-bit PWM DAC is shown in

Fig.8. Each PWM output can generate pulses of

The analog value is calculated as follows:

t_HIGH

programmable length that have a repetition frequency of

V_A= ------------- × V_O

₆₄× f_PWM, where f_PWM= ¹⁄₃× f_XTAL

t_r

⁄

Where:

8.1.1

PIN SELECTION FOR PWM OUTPUTS

• t_HIGH= t₀× PWMDL = HIGH time of the PWM pulse

The PWM outputs PWM1 to PWM5, share the same pins

as the Derivative Port lines DP0.1 to DP0.5.

• t_r= t₀× 64 = repetition time of the PWM pulse

Setting the (relevant PWM enable) bit PWMnE to:

• Logic 1, selects the relevant PWMx output function

• Logic 0, selects the relevant DP0.x Port function.

• t₀

-------------

f_XTAL

• PWMDL is the decimal value of the contents of the

PWM data latch.

8.1.2

POLARITY OF THE PWM OUTPUTS

Therefore, the analog output voltage is:

The polarity of all five PWM outputs is selected by the state

of the polarity control bit P6LVL.

PWMDL

V_A= ----------------------- × V_O

Setting the control bit P6LVL to:

• Logic 0, sets the PWMx outputs to the default polarity

• Logic 1, inverts all the PWMx outputs.

handbook, full pagewidth

DP0.x data

I / O

6-BIT PWM DATA LATCH

PWM

PWMnE

6-BIT DAC PWM

CONTROLLER

DP0.x / PWMx

polarity control bit

P6LVL

MCD176

Fig.8 Block diagram of the 6-bit PWM DAC.

October 1994

1...6 7 8910 11 12...38

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