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843034DY-06LF

更新时间： 2024-10-02 21:09:19
品牌 Logo 应用领域
艾迪悌 - IDT 时钟外围集成电路晶体
页数 文件大小 规格书
21页 286K
描述
Clock Generator, 375MHz, PQFP48, 7 X 7 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, MS-026, LQFP-48

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843034DY-06LF 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFP
包装说明：LFQFP,针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.76
JESD-30 代码：S-PQFP-G48JESD-609代码：e3
长度：7 mm湿度敏感等级：3
端子数量：48最高工作温度：70 °C
最低工作温度：最大输出时钟频率：375 MHz
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：260主时钟/晶体标称频率：40 MHz
认证状态：Not Qualified座面最大高度：1.6 mm
最大供电电压：3.465 V最小供电电压：3.135 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：MATTE TIN端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：7 mm
uPs/uCs/外围集成电路类型：CLOCK GENERATOR, OTHERBase Number Matches：1

843034DY-06LF 数据手册

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PRELIMINARY  
FEMTOCLOCKS™ MULTI-RATE 3.3V  
LVPECL FREQUENCY SYNTHESIZER  
ICS843034-06  
GENERAL DESCRIPTION  
FEATURES  
The ICS843034-06 is a general purpose, low phase  
• Dual differential 3.3V LVPECL outputs  
ICS  
noise LVPECL synthesizer which can generate  
• 4:1 Input Mux:  
HiPerClockS™  
frequencies for a wide variety of applications. The  
ICS843034-06 has a 4:1 input multiplexer from which  
the following inputs can be selected: one differential  
input, one single-ended input, or one of two crystal  
One differential input  
One single-ended input  
Two crystal oscillator interfaces  
oscillators, thus making the device ideal for frequency translation  
or frequency generation. The ICS843034-06 has dual LVPECL  
outputs that may be programmed for ÷2, ÷4 or ÷5 of the VCO  
frequency. The ICS843034-06 also supplies a buffered copy of  
the reference clock or crystal frequency on the single-ended  
REF_OUT pin which can be enabled or disabled (disabled by  
default). The output frequency can be programmed using either  
a serial or parallel programming interface. This device supports  
Spread Spectrum Clocking (SSC) for EMI reduction.  
• CLK, nCLK pair can accept the following differential  
input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL  
• Output frequency range: 112MHz to 375MHz  
• Crystal input frequency range: 12MHz to 40MHz  
• VCO range: 560MHz to 750MHz  
• Supports Spread Spectrum Clocking (SSC)  
• Parallel or serial interface for programming feedback divider  
and output dividers  
• RMS phase jitter at 166.6MHz, using a 22.222MHz crystal  
(12kHz to 20MHz): 1.3ps (typical), SSC - Off  
• 3.3V supply mode  
• 0°C to 70°C ambient operating temperature  
• Available in lead-free (RoHS 6) package  
BLOCK DIAGRAM  
Pullup  
OE_A  
÷
÷
÷
001  
011  
100  
2
4
5
Pullup  
VCO_SEL  
XTAL_IN0  
FOUTA0  
nFOUTA0  
PIN ASSIGNMENT  
00  
01  
OSC  
OSC  
Pullup  
XTAL_OUT0  
XTAL_IN1  
0
1
VCCO_A  
XTAL_OUT1  
Phase  
Detector  
VCO  
CLK  
nCLK  
VCCO_B  
10  
11  
Pullup/Pulldown  
FOUTB0  
nFOUTB0  
Pulldown  
48 47 46 45 44 43 42 41 40 39 38 37  
REF_CLK  
÷M  
XTAL_OUT1  
XTAL_IN1  
XTAL_OUT0  
XTAL_IN0  
REF_CLK  
SEL1  
M8  
RESERVED  
RESERVED  
RESERVED  
OE_REF  
OE_A  
1
36  
Pulldown  
Pulldown  
SEL1  
SEL0  
2
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
3
4
ICS843034-06  
Pullup  
OE_B  
MR  
5
VCCO_REF  
REF_OUT  
48-Pin LQFP  
7mm x 7mm x 1.4mm  
package body  
Pulldown  
6
SEL0  
OE_B  
7
Pulldown  
Pulldown  
Pulldown  
Pulldown  
Pulldown  
OE_REF  
S_LOAD  
VCCA  
VCC  
8
Y Package  
Top View  
S_LOAD  
S_DATA  
S_CLOCK  
MR  
NA0  
9
TEST  
S_DATA  
NA1  
10  
11  
12  
Configuration  
Interface  
Logic  
S_CLOCK  
NA2  
nP_LOAD  
M8:M0  
VEE  
M0:M4 M6:M8 Pulldown, M5 Pullup  
13 14 15 16 17 18 19 20 21 22 23 24  
NA2 Pulldown, NA1:0 Pullup  
NA2:NA0  
The Preliminary Information presented herein represents a product in pre-production.The noted characteristics are based on initial product characterization  
and/or qualification.Integrated DeviceTechnology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.  
™
IDT / ICS™ 3.3V LVPECLFREQUENCY SYNTHESIZER  
1
ICS843034DY-06 REV. C JANUARY 14, 2008  
1234567...21

中文翻译

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