Datasheet > 843002BKI-72LF

843002BKI-72LF

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
艾迪悌 - IDT		时钟发生器石英晶振压控振荡器衰减器
页数	文件大小	规格书
18页	296K
描述
FEMTOCLOCKS⑩ VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR

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843002BKI-72LF 数据手册

ICS843002I-72

FEMTOCLOCKS™ VCXO BASED WCDMA CLOCK GENERATOR/JITTER ATTENUATOR

TABLE 4E. LVPECL DC CHARACTERISTICS, V_CC= 3.3V 5ꢀ, V_CCO= 2.5V 5ꢀ, V_EE= 0V, TA = -40°C TO 85°C

Symbol Parameter

Test Conditions

Minimum Typical Maximum Units

V_OH

Output High Voltage; NOTE 1

V_CCO- 1.4

V_CCO- 2.0

0.4

V_CCO- 0.9

V_CCO- 1.5

1.0

V_OL

Output Low Voltage; NOTE 1

V_SWING

Peak-to-Peak Output Voltage Swing

NOTE 1: Outputs terminated with 50 Ω to V_CCO- 2V. See "Parameter Measurement Information" section,

"Output Load Test Circuit" diagrams.

TABLE 5A. AC CHARACTERISTICS, V_CC= V_CCO= 3.3V 5ꢀ, V_EE= 0V, TA = -40°C TO 85°C

Symbol Parameter

Test Conditions

Minimum Typical Maximum Units

F_OUT

Output Frequency

122.88

MHz

RMS Phase Jitter, (Random);

NOTE 1

122.88MHz, Integration range:

1.875MHz - 10MHz

tjit(ø)

0.49

t_DJ

Deterministic Jitter; NOTE 2

Random Jitter, RMS; NOTE 2

Output Skew; NOTE 3, 4

Output Rise/Fall Time

t_RJ

2.2

ꢀ

tsk(o)

t_R/ t_F

odc

550

20ꢀ to 80ꢀ

300

Output Duty Cycle

See Parameter Measurement Information section.

NOTE 1: Please refer to the Phase Noise Plot.

NOTE 2: Measured using Wavecrest SIA-3000.

NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.

Measured at the output differential cross points.

NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.

TABLE 5B. AC CHARACTERISTICS, V_CC= 3.3V 5ꢀ, V_CCO= 2.5V 5ꢀ, V_EE= 0V, TA = -40°C TO 85°C

Symbol Parameter

Test Conditions

Minimum Typical Maximum Units

F_OUT

Output Frequency

122.88

MHz

RMS Phase Jitter, (Random);

NOTE 1

122.88MHz, Integration range:

1.875MHz - 10MHz

tjit(ø)

0.49

t_DJ

Deterministic Jitter; NOTE 2

Random Jitter, RMS; NOTE 2

Output Skew; NOTE 3, 4

Output Rise/Fall Time

t_RJ

2.2

ꢀ

tsk(o)

t_R/ t_F

odc

550

20ꢀ to 80ꢀ

300

Output Duty Cycle

See Parameter Measurement Information section.

NOTE 1: Please refer to the Phase Noise Plot.

NOTE 2: Measured using Wavecrest SIA-3000.

NOTE 3: Defined as skew between outputs at the same supply voltage and with equal load conditions.

Measured at the output differential cross points.

NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.

IDT^™/ ICS^™WCDMA CLOCK GENERATOR/JITTER ATTENUATOR

ICS843002BKI-72 REV. A NOVEMBER 21, 2007

1 2 3 456 7 8...18

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与843002BKI-72LF相关器件

型号	品牌	描述	获取价格	数据表
843002BKI-72LFT	IDT	FEMTOCLOCKS⑩ VCXO BASED WCDMA CLOCK GENERATOR	获取价格
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843002BY-31LF	IDT	Clock Generator, 700MHz, PQFP64, 10 X 10 MM, 1 MM HEIGHT, ROHS COMPLIANT, MS-026ACD-HD, TQ	获取价格
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843002BY-31T	IDT	Clock Generator, 700MHz, PQFP64, 10 X 10 MM, 1 MM HEIGHT, MS-026ACD-HD, TQFP-64	获取价格
843002CY-31LF	IDT	Clock Generator, 700MHz, PQFP64, 10 X 10 MM, 1 MM HEIGHT, ROHS COMPLIANT, MS-026, TQFP-64	获取价格

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