Datasheet > 75T204-IP

75T204-IP

更新时间： 2024-02-26 23:59:29

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
9页	66K
描述
5V Low-Power Subscriber DTMF Receiver

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中文翻译

获取价格

技术参数
数据手册

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75T204-IP 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.23	Is Samacsys：	N
JESD-30 代码：	R-PDIP-T18	功能数量：	1
端子数量：	18	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装形状：	RECTANGULAR	封装形式：	IN-LINE
认证状态：	Not Qualified	最大压摆率：	16 mA
标称供电电压：	5 V	表面贴装：	NO
电信集成电路类型：	DTMF SIGNALING CIRCUIT	温度等级：	INDUSTRIAL
端子形式：	THROUGH-HOLE	端子位置：	DUAL
Base Number Matches：	1

75T204-IP 数据手册

75T204

5V Low-Power Subscriber

DTMF Receiver

April 2000

DESCRIPTION

FEATURES

The 75T204 is a complete Dual-Tone Multifrequency

(DTMF) receiver that detects 16 standard digits. No

front-end pre-filtering is needed. The only external

components required are an inexpensive 3.58-MHz

television “colorburst” crystal for frequency reference

and a bias resistor. An Alternate Time Base (ATB)

is provided to permit operation of up to 10 75T204's

from a single crystal. The 75T204 employs state-of-

Intended for applications with less

requirements than the 75T202/75T203

14-pin plastic DIP or 16-pin SO package for

high system density

NO front-end band-splitting filters required

Single low-tolerance 5-volt supply

Detects all 16 standard DTMF digits.

Uses an inexpensive 3.579545-MHz crystal

Excellent speech immunity

the-art

"switched-capacitor"

filter

technology,

resulting in approximately 40 poles of filtering, and

digital circuitry on the same CMOS chip. The analog

input signal is pre-processed by 60-Hz reject and

band split filters and then zero-cross detected to

provide AGC. Eight bandpass filters detect the

Output in 4-bit hexadecimal code

Three-state outputs for microprocessor

interface

individual tones.

measure the tone and pause durations

Digital processing is used to

(continued)

BLOCK DIAGRAM

BANDPASS FILTERS

697

AMPLITUDE

DETECTORS

BAND

SPLIT

FILTERS

ZERO

CROSSING

DETECTORS

770

852

941

PRE-PROCESSOR

60 Hz

PREEMP

REJECT

ANALOG

BS1

TIMING

CIRCUITRY

BS2

1209

1336

ATB

XEN

1477

DATA STROBE

1633

XIN

CLOCK

GENERATOR

÷ 8

CHIP CLOCKS

1Mz

XOUT

OUTPUT

DECODER

OUTPUT

VOLTAGE

REF

POWER REGULATOR

DATA CLEAR

GND

12 3 4 5 6 7...9

中文翻译

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