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75N42102S100BS PDF预览

75N42102S100BS

更新时间： 2024-11-18 21:12:55
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
3页 45K
描述
Telecom IC

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中文翻译

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75N42102S100BS 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
包装说明：,Reach Compliance Code：not_compliant
风险等级：5.92JESD-609代码：e0
湿度敏感等级：3端子面层：Tin/Lead (Sn63Pb37)
Base Number Matches：1

75N42102S100BS 数据手册

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Datasheet  
Brief  
75N42102  
NETWORK SEARCH ENGINE  
32K x 72 Entries  
To request the full IDT75N42102 datasheet, please contact your local  
IDT Sales Representative or call 1-831-754-4555  
BlockDiagram  
DeviceDescription  
IDT provides proven, industry-leading network search engines  
(NSEs)thatenableandacceleratetheintelligentprocessingofnetwork  
services incommunications equipment. As a partofthe complete IDT  
classificationsubsystemthatincludescontentinspectionengines,theIDT  
family of NSEs delivers high-performance, feature-rich, easy-to-use,  
integratedsearchaccelerators.  
CONFIGOUT  
MATCHIN  
CONFIGIN  
Configuration Registers  
and  
SRAM CONTROL  
ASIC FEEDBACK  
Ram Control Circuits  
CLOCK  
÷
2
CCLK  
PHASE  
P
R
I
S
I
O
R
I
RESET  
Z
TheIDT 75N42102NSEisahighperformance,lowcost, full-ternary  
32K x 72 entry device. Each entry location in the NSE has both a Data  
entryandanassociatedMaskentry. TheNSEdevicesintegratecontent  
addressable memory(CAM)technologywithhigh-performance logic.  
The device can perform Lookup operations plus Read and Write  
maintenanceoperations.  
The IDT 75N42102 NSE device has a bi-directional bus that is a  
multiplexed address and data bus that can support up to 200 million  
sustainedsearchespersecond. Thisdeviceofferstheabilitytosimulta-  
neouslysearchinmutuallyexclusivedatabasessubstantiallyincreasing  
theNSEsearch rate.Thisdevicecanbeconfiguredtoenablemultiple  
widthlookups from40to288bits wide. The IDT75N42102requires a  
1.5-volt VDD1 supply and a 2.5-volt VDD2 supply.  
E
Index  
Bus  
ARRAY  
T
Y
REQSTB  
R/W  
L
O
G
I
NSE  
RESPONSE  
BUS  
Instruction  
Command  
Bus  
E
N
C
O
D
E
R
NSE  
REQUEST  
BUS  
C
D
E
C
O
D
E
Request  
Data  
Address  
Bypass  
Bus  
Global Mask Registers  
Result Register  
DATA  
MATCHOUT  
6
457 drw 01  
TheIDT75N42102NSEutilizesthelatesthigh-performance1.5V  
CMOSprocessingtechnologyandis packagedinaJEDECStandard,  
thermally enhanced, 304 pin low profile Ball Grid Array.  
SystemConfigurations  
Figure 1.0 ASIC / Compatible NSE / SRAM configuration  
The IDT NSEs are designed to fulfill the needs of various types of  
networking systems. In solutions requiring data searching such as  
routers,asystemconfigurationasshowninFigure1.0mayberealized.  
Inthisconfiguration,theNSEinterfacesdirectlytoanASIC/FPGAfor  
lookups and routes an Index to an associated SRAM device, which  
suppliesthenexthopaddressviaanSRAMDataBustotheASIC.The  
NSEprovides the requiredcontrolsignals todirectlyhookuptoZBT™  
orSynchronous PipelineBurstSRAM. Lookupresults canalsobefed  
directlybacktotheASIC/FPGAwithouttheuseofexternalSRAM.Control  
oftheassociatedhandshakesignalsisprovidedbyallNSEstoadaptto  
eitherconfiguration.  
Optional  
ASIC  
or  
ZBT  
or  
IDT75N42102  
NetworkSearch  
Engine  
SyncSRAM  
FPGA  
6457 drw02  
APRIL 2004  
1
DSC-6457/00  
2004 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice.  
123

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