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74VHC541SJX_NL PDF预览

74VHC541SJX_NL

更新时间： 2024-11-29 21:18:27
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
7页 99K
描述
Bus Driver, 1-Func, 8-Bit, True Output, CMOS, PDSO20,

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74VHC541SJX_NL 技术参数

是否Rohs认证： 符合生命周期：Obsolete
包装说明：SOP, SOP20,.3Reach Compliance Code：compliant
风险等级：5.84控制类型：ENABLE LOW
JESD-30 代码：R-PDSO-G20负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.008 A
位数：8功能数量：1
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP20,.3
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TAPE AND REEL电源：2/5.5 V
Prop。Delay @ Nom-Sup：8 ns认证状态：Not Qualified
子类别：Bus Driver/Transceivers表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUALBase Number Matches：1

74VHC541SJX_NL 数据手册

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August 1993  
Revised May 2005  
74VHC541  
Octal Buffer/Line Driver with 3-STATE Outputs  
An input protection circuit insures that 0V to 7V can be  
General Description  
applied to the input pins without regard to the supply volt-  
age. This device can be used to interface 5V to 3V systems  
and two supply systems such as battery backup. This cir-  
cuit prevents device destruction due to mismatched supply  
and input voltages.  
The VHC541 is an advanced high-speed CMOS device  
fabricated with silicon gate CMOS technology. It achieves  
the high-speed operation similar to equivalent Bipolar  
Schottky TTL while maintaining the CMOS low power dissi-  
pation.  
The VHC541 is an octal buffer/line driver designed to be  
employed as memory and address drivers, clock drivers  
and bus oriented transmitter/receivers.  
Features  
■ High Speed: tPD 3.5 ns (typ) at VCC 5V  
■ Low power dissipation: ICC  
4 A (max) at TA 25 C  
This device is similar in function to the VHC244 while pro-  
viding flow-through architecture (inputs on opposite side  
from outputs). This pinout arrangement makes this device  
especially useful as an output port for microprocessors,  
allowing ease of layout and greater PC board density.  
■ High noise immunity: VNIH VNIL 28% VCC (min)  
■ Power down protection is provided on all inputs  
■ Low noise: VOLP 0.9V (typ)  
■ Pin and function compatible with 74HC541  
Ordering Code:  
Order Number Package Number  
Package Description  
74VHC541M  
74VHC541SJ  
74VHC541MTC  
74VHC541N  
M20B  
M20D  
MTC20  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide  
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Pb-Free package per JEDEC J-STD-020B.  
Connection Diagram  
Logic Symbol  
IEEE/IEC  
Truth Table  
Pin Descriptions  
Inputs  
OE2  
Outputs  
Pin Names  
Descriptions  
OE1  
I
OE1, OE2  
3-STATE Output Enable Inputs  
Inputs  
L
H
X
L
L
X
H
L
H
X
X
L
H
Z
Z
L
I0 - I7  
O0 - O7  
3-STATE Outputs  
H
L
HIGH Voltage Level  
LOW Voltage Level  
X
Z
Immaterial  
High Impedance  
© 2005 Fairchild Semiconductor Corporation  
DS011639  
www.fairchildsemi.com  
1234567

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