Datasheet > 74LVX273T

74LVX273T

更新时间： 2024-09-24 23:24:31

品牌	Logo	应用领域
其他 - ETC		触发器逻辑集成电路光电二极管
页数	文件大小	规格书
10页	75K
描述
Octal D-Type Flip-Flop

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中文翻译

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数据手册

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74LVX273T 数据手册

74LVX273

LOW VOLTAGE OCTAL D-TYPE FLIP FLOP

WITH CLEAR WITH 5V TOLERANT INPUTS

■

HIGH SPEED:

_MAX=150MHz(TYP.) at V_CC=3.3V

5V TOLERANT INPUTS

■

POWER-DOWN PROTECTIONON INPUTS

INPUT VOLTAGELEVEL:

V_IL=0.8V,V_IH=2V atV_CC=3V

LOW POWER DISSIPATION:

I_CC=4 µA (MAX.) at T_A=25 ^oC

LOWNOISE:

(Micro Package)

(TSSOPPackage)

■

ORDER CODES :

74LVX273M

74LVX273T

V_OLP=0.3 V (TYP.)at V_CC= 3.3V

SYMMETRICAL OUTPUT IMPEDANCE:

|I_OH| = I_OL= 4 mA (MIN)

BALANCEDPROPAGATIONDELAYS:

t_PLHt_PHL

transfered to the Q outputs on the positive going

edge of the clock pulse.

When the CLEAR input is held low, the Q outputs

are held low independentlyof the other inputs.

It has better speed performance at 3.3V than 5V

LS-TTL family combined with the true CMOS low

power consumption.

Power down protection is provided on all inputs

and 0 to 7V can be accepted on inputs with no

regard to the supply voltage. This device can be

used to interface5V to 3V.

OPERATING VOLTAGERANGE:

V_CC(OPR)= 2V to 3.6V

PIN AND FUNCTION COMPATIBLEWITH

74 SERIES273

IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The LVX273 is a low voltage CMOS OCTAL

D-TYPE FLIP FLOP WITH CLEAR fabricated

with sub-micron silicon gate and double-layer

metal wiring C²MOS technology. It is ideal for low

power and low noise 3.3V applications.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

Information signals applied to D inputs are

PIN CONNECTION AND IEC LOGIC SYMBOLS

1/10

April 1999

12 3 4 5 6 7...10

中文翻译

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型号	品牌	获取价格	描述	数据表
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