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74LVX3245QSC_NL PDF预览

74LVX3245QSC_NL

更新时间: 2024-11-15 13:04:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
7页 78K
描述
Bus Transceiver, LV/LV-A/LVX/H Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, 0.150 INCH, LEAD FREE, MO-137, QSOP-24

74LVX3245QSC_NL 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:SSOP,针数:24
Reach Compliance Code:unknown风险等级:5.65
其他特性:PORT A OPERATES AT 3V SUPPLY AND PORT B OPERATES AT 5V SUPPLY系列:LV/LV-A/LVX/H
JESD-30 代码:R-PDSO-G24JESD-609代码:e3
长度:8.6614 mm逻辑集成电路类型:BUS TRANSCEIVER
位数:8功能数量:1
端口数量:2端子数量:24
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd):9 ns认证状态:Not Qualified
座面最大高度:1.7272 mm最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.635 mm
端子位置:DUAL宽度:3.9116 mm
Base Number Matches:1

74LVX3245QSC_NL 数据手册

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July 1993  
Revised September 2003  
74LVX3245  
8-Bit Dual Supply Translating Transceiver with  
3-STATE Outputs  
General Description  
Features  
Bidirectional interface between 3V and 5V buses  
The LVX3245 is a dual-supply, 8-bit translating transceiver  
that is designed to interface between a 3V bus and a 5V  
bus in a mixed 3V/5V supply environment. The Transmit/  
Receive (T/R) input determines the direction of data flow.  
Transmit (active-HIGH) enables data from A Ports to B  
Ports; Receive (active-LOW) enables data from B Ports to  
A Ports. The Output Enable input, when HIGH, disables  
both A and B Ports by placing them in a high impedance  
condition. The A Port interfaces with the 3V bus; the B Port  
interfaces with the 5V bus.  
Inputs compatible with TTL level  
3V data flow at A Port and 5V data flow at B Port  
Outputs source/sink 24 mA  
Guaranteed simultaneous switching noise level and  
dynamic threshold performance  
Implements proprietary EMI reduction circuitry  
Functionally compatible with the 74 series 245  
The LVX3245 is suitable for mixed voltage applications  
such as notebook computers using 3.3V CPU and 5V  
peripheral components.  
Ordering Code:  
Order Number Package Number  
Package Description  
74LVX3245WM  
74LVX3245QSC  
74LVX3245MTC  
M24B  
MQA24  
MTC24  
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide  
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide  
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbol  
Connection Diagram  
Pin Descriptions  
Pin Names  
Description  
OE  
T/R  
Output Enable Input  
Transmit/Receive Input  
A0A7  
B0B7  
Side A Inputs or 3-STATE Outputs  
Side B Inputs or 3-STATE Outputs  
© 2003 Fairchild Semiconductor Corporation  
DS011620  
www.fairchildsemi.com  

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