Datasheet > 74LVQ4066_04

74LVQ4066_04

更新时间： 2024-11-18 03:19:11

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		开关
页数	文件大小	规格书
12页	248K
描述
QUAD BILATERAL SWITCH

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中文翻译

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数据手册

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74LVQ4066_04 数据手册

74LVQ4066

QUAD BILATERAL SWITCH

■

HIGH SPEED:

= 0.4 ns (TYP.) at V = 3.3 V

= 0.1 ns (TYP.) at V = 5 V

■

LOW POWER DISSIPATION:

= 2µA (MAX.) at T =25°C

LOW "ON " LOW RESISTANCE

SOP

TSSOP

= 14Ω at V = 3.3V, I < 1 mA

CC I/O

= 12Ω at V = 5.0V, I < 1 mA

I/O

■

SINE WAVE DISTORTION:

Table 1: Order Codes

PACKAGE

0.04% at V = 3.3V, f = 1KHz

OPERATING VOLTAGE RANGE:

T & R

= 2V to 5.5V

CC(OPR)

SOP

74LVQ4066MTR

74LVQ4066TTR

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 4066

IMPROVED LATCH-UP IMMUNITY

TSSOP

without relevant propagation delay and without

generating additional ground bounce noise.

It has an ON-Resistance which is greatly reduced

in comparison with 74HC4066.

It is provided of four individual enable inputs to

control the switches; the switch is ON when the C

input is held high and OFF (High Impedance)

when C is held low.

DESCRIPTION

The 74LVQ4066 is a low voltage CMOS QUAD

BILATERAL SWITCH fabricated with sub-micron

silicon gate and double-layer metal wiring C MOS

technology.

It is ideal for low power and low noise 3.3V

applications and each switch is designed to

handle both analog and digital signals.

The switches permit signals with amplitudes up to

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them ESD immunity and transient excess voltage.

(peak) to be transmitted in either direction

Figure 1: Pin Connection And IEC Logic Symbols

Rev. 8

1/12

July 2004

12 3 4 5 6 7...12

中文翻译

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