Datasheet > 74LVCH245APW,118

74LVCH245APW,118

更新时间： 2025-09-25 19:11:03

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
16页	269K
描述
类型:Transceiver, Non-Inverting;功能单元数:1;位数(bit):8;最小工作电压(V):1.2 V;最大工作电压(V):3.6 V;元器件封装:20-TSSOP;

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74LVCH245APW,118 数据手册

74LVC245A; 74LVCH245A

Octal bus transceiver; 3-state

Rev. 9 — 11 September 2018

Product data sheet

1. General description

The 74LVC245A; 74LVCH245A are 8-bit transceivers featuring non-inverting 3-state bus

compatible outputs in both send and receive directions. The device features an output enable

(OE) input for easy cascading and a send/receive (DIR) input for direction control. OE controls the

outputs so that the buses are effectively isolated.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to

the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications.

The 74LVCH245A bus hold on data inputs eliminates the need for external pull-up resistors to hold

unused inputs.

2. Features and benefits

•

5 V tolerant inputs/outputs for interfacing with 5 V logic

•

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low-power consumption

Direct interface with TTL levels

Inputs accept voltages up to 5.5 V

High-impedance when V_CC= 0 V

Bus hold on all data inputs (74LVCH245A only)

Complies with JEDEC standard:

•

JESD8-7A (1.65 V to 1.95 V)

JESD8-5A (2.3 V to 2.7 V)

JESD8-C/JESD36 (2.7 V to 3.6 V)

•

ESD protection:

•

HBM JESD22-A114F exceeds 2000 V

MM JESD22-A115B exceeds 200 V

CDM JESD22-C101E exceeds 1000 V

Specified from -40 °C to +85 °C and -40 °C to +125 °C

12 3 4 5 6 7...16

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74LVCH245APW,118 替代型号

型号	品牌	替代类型	描述	数据表
74LVCH245APW	NEXPERIA	完全替代	Octal bus transceiver; 3-stateProduction

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