Datasheet > 74LVCH2573APY8

74LVCH2573APY8

更新时间： 2023-01-02 20:32:03

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
6页	62K
描述
SSOP-20, Reel

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数据手册

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74LVCH2573APY8 数据手册

IDT74LVCH2573A

INDUSTRIALTEMPERATURERANGE

3.3VCMOSOCTALTRANSPARENTD-TYPELATCH

3.3V CMOS OCTAL

TRANSPARENT D-TYPE LATCH

IDT74LVCH2573A

WITH 3-STATE OUTPUTS, 5 VOLT

TOLERANT I/O AND BUS-HOLD

FEATURES:

DESCRIPTION:

• 0.5 MICRON CMOS Technology

The LVCH2573A octal transparent D-type latch is built using advanced

dualmetalCMOStechnology.Thedevicefeatures3-stateoutputsdesigned

specificallyfordrivinghighlycapacitiveorrelativelylow-impedanceloads,

andisparticularlysuitableforimplementingbufferregisters,input-output(I/

O) ports, bidirectional bus drivers, and working registers.

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• VCC = 3.3V ± 0.3V, Normal Range

• VCC = 2.7V to 3.6V, Extended Range

• CMOS power levels (0.4µ W typ. static)

• Rail-to-rail output swing for increased noise margin

• All inputs, outputs, and I/O are 5V tolerant

• Supports hot insertion

Whilethelatch-enable(LE)inputishigh,theQoutputsfollowthedata(D)

inputs. When LE is taken low, the Q outputs are latched at the logic levels

at the D inputs.

Abufferedoutput-enable(OE)inputcanbeusedtoplacetheeightoutputs

in either a normal logic state (high or low logic levels) or a high-impedance

state.Inthehigh-impedancestate,theoutputsneitherloadnordrivethebus

lines significantly. The high-impedance state and increased drive provide

thecapabilitytodrivebuslineswithoutinterfaceorpullupcomponents. OE

doesnotaffecttheinternaloperationsofthelatch. Olddatacanberetained

ornewdatacanbeenteredwhiletheoutputsareinthehigh-impedancestate.

TheLVCH2573Ahasseriesresistorsinthedeviceoutputstructurewhich

willsignificantlyreducelinenoisewhenusedwithlightloads.Thisdriverhas

been developed to drive ±12mA at the designated thresholds.

Inputs can be driven from either 3.3V or 5V devices. This feature allows

theuseofthisdeviceasatranslatorinamixed3.3V/5Vsystemenvironment.

The LVCH2573A has “bus-hold” which retains the inputs’ last state

whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputs

and eliminates the need for pull-up/down resistors.

• Available in SOIC, SSOP, QSOP, and TSSOP packages

DRIVE FEATURES:

• Balanced Output Drivers: ±12mA

• Low switching noise

APPLICATIONS:

• 5V and 3.3V mixed voltage systems

• Data communication and telecommunication systems

FUNCTIONALBLOCKDIAGRAM

TO SEVEN OTHER CHANNELS

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

FEBRUARY 2000

DSC-4942/1

12 3 4 5 6

中文翻译

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与74LVCH2573APY8相关器件

型号	品牌	获取价格	描述	数据表
74LVCH2573APY9	IDT	获取价格	SSOP-20, Reel
74LVCH2573AQ	IDT	获取价格	QSOP-20, Tube
74LVCH2573ASO8	IDT	获取价格	SOIC-20, Reel
74LVCH2574AD	NXP	获取价格	IC LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, Bus Driver/Transceiver
74LVCH2574AD	PHILIPS	获取价格	D Flip-Flop, 8-Func, Positive Edge Triggered, CMOS, PDSO20
74LVCH2574ADB	NXP	获取价格	IC LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, Bus Driver/Transceiver
74LVCH2574ADB	PHILIPS	获取价格	D Flip-Flop, 8-Func, Positive Edge Triggered, CMOS, PDSO20
74LVCH2574ADB-T	NXP	获取价格	IC LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, Bus Driver/Transceiver
74LVCH2574AD-T	NXP	获取价格	IC LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, Bus Driver/Transceiver
74LVCH2574APW	PHILIPS	获取价格	D Flip-Flop, 8-Func, Positive Edge Triggered, CMOS, PDSO20

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