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74LVC373AQ20-13 PDF预览

74LVC373AQ20-13

更新时间： 2024-02-24 18:22:12
品牌 Logo 应用领域
美台 - DIODES 驱动逻辑集成电路
页数 文件大小 规格书
10页 438K
描述
Bus Driver, LVC/LCX/Z Series, 1-Func, 8-Bit, True Output, CMOS, 2.50 X 4.50 MM, 0.95 MM HEIGHT, 0.50 MM PITCH, GREEN, VQFN-20

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74LVC373AQ20-13 技术参数

是否Rohs认证：符合生命周期：Active
包装说明：HVQCCN,Reach Compliance Code：compliant
HTS代码：8542.39.00.01Factory Lead Time：17 weeks
风险等级：2.11Is Samacsys：N
系列：LVC/LCX/ZJESD-30 代码：R-XQCC-N20
长度：4.5 mm逻辑集成电路类型：BUS DRIVER
湿度敏感等级：1位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：125 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装形状：RECTANGULAR
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：NOT SPECIFIED
传播延迟（tpd）：22.5 ns座面最大高度：0.85 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：1.65 V
标称供电电压 (Vsup)：1.8 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：2.5 mmBase Number Matches：1

74LVC373AQ20-13 数据手册

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74LVC373A  
OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS  
Description  
Pin Assignments  
The 74LVC373A provides eight transparent D-type latches. While the  
latch-enable (LE) input is high, the Q outputs follow the data (D)  
inputs. When LE is taken low, the Q outputs are latched at the logic  
levels set up at the D inputs. A buffered output-enable (OE) input can  
be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus lines significantly. The  
high-impedance state and increased drive provide the capability to  
drive bus lines without interface or pullup components. OE does not  
affect the internal operations of the latches. Old data can be retained  
or new data can be entered while the outputs are in the high-  
impedance state.  
The device is designed for operation with a power supply range of  
1.65V to 3.6V.  
The inputs are tolerant to 5.5V allowing this device to be used in a  
mixed voltage environment. The device is fully specified for partial  
Applications  
•
•
•
•
General Purpose Logic  
power down applications using IOFF  
. The IOFF circuitry disables the  
Bus Driving  
output preventing damaging current backflow when the device is  
powered down.  
Power Down Signal Isolation  
Wide array of products such as:  
ƒ
PCs, Notebooks, Netbooks, Ultrabooks  
Networking Computer Peripherals, Hard Drives, CD/DVD  
ROM  
Features  
ƒ
ƒ
•
•
•
•
•
•
Supply Voltage Range from 1.65V to 3.6V  
Sinks or Sources 24mA at VCC = 3V  
CMOS Low Power Consumption  
TV, DVD, DVR, Set Top Box  
I
OFF Supports Partial Power Down Operation  
Inputs or Outputs Accept Up to 5.5V  
Inputs Can Be Driven by 3.3V or 5V Allowing for Mixed Voltage  
Applications  
•
•
Schmitt Trigger Action at All Inputs  
Typical VOLP (Quiet Output Ground Bounce) Less Than 0.8V with  
VCC = 3.3V and TA = +25°C  
•
•
Typical VOHV (Quiet Output dynamic VOH) Greater than 2.0V with  
VCC = 3.3V and TA = +25°C  
ESD Protection Tested per JESD 22  
ƒ
ƒ
ƒ
Exceeds 200-V Machine Model (A115)  
Exceeds 2000-V Human Body Model (A114)  
Exceeds 1000-V Charged Device Model (C101)  
•
•
Latch-Up Exceeds 250mA per JESD 78, Class II  
All devices are:  
ƒ
ƒ
Totally Lead-Free & Fully RoHS compliant (Notes 1 & 2)  
Halogen and Antimony Free. “Green” Device (Note 3)  
Notes:  
1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.  
2. See http://www.diodes.com/quality/lead_free.html for more information about Diodes Incorporated’s definitions of Halogen and Antimony free,  
"Green" and Lead-Free.  
3. Halogen and Antimony free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and  
<1000ppm antimony compounds.  
1 of 10  
www.diodes.com  
June 2014  
© Diodes Incorporated  
74LVC373A  
Document number: DS35893 Rev. 1 - 2  
1234567...10

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