Datasheet > 74LVC2G86GM-G

74LVC2G86GM-G

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74LVC2G86GM-G 技术参数

74LVC2G86

Dual 2-input EXCLUSIVE-OR gate

Rev. 07 — 13 June 2008

Product data sheet

1. General description

The 74LVC2G86 provides a dual 2-input EXCLUSIVE-OR gate.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

devices as translators in a mixed 3.3 V and 5 V environment.

This device is fully speciﬁed for partial power-down applications using I_OFF. The I_OFF

circuitry disables the output, preventing the damaging backﬂow current through the device

when it is powered down.

2. Features

I Wide supply voltage range from 1.65 V to 5.5 V

I 5 V tolerant inputs for interfacing with 5 V logic

I High noise immunity

I Complies with JEDEC standard:

N JESD8-7 (1.65 V to 1.95 V)

N JESD8-5 (2.3 V to 2.7 V)

N JESD8B/JESD36 (2.7 V to 3.6 V)

I ESD protection:

N HBM JESD22-A114E exceeds 2000 V

N MM JESD22-A115-A exceeds 200 V

I ±24 mA output drive (V_CC= 3.0 V)

I CMOS low-power consumption

I Latch-up performance exceeds 250 mA

I Direct interface with TTL levels

I Inputs accept voltages up to 5 V

I Multiple package options

I Speciﬁed from −40 °C to +85 °C and −40 °C to +125 °C

12 3 4 5 6 7...16

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型号	品牌	描述	获取价格	数据表
74LVC2G86GN	NXP	LVC/LCX/Z SERIES, DUAL 2-INPUT XOR GATE, PDSO8, 1.20 X 1 MM, 0.35 MM HEIGHT, SOT-1116, SON	获取价格
74LVC2G86GN	NEXPERIA	Dual 2-input EXCLUSIVE-OR gateProduction	获取价格
74LVC2G86GS	NXP	LVC/LCX/Z SERIES, DUAL 2-INPUT XOR GATE, PDSO8, 1.35 X 1 MM, 0.35 MM HEIGHT, 0.35 MM PITCH	获取价格
74LVC2G86GS	NEXPERIA	Dual 2-input EXCLUSIVE-OR gateProduction	获取价格
74LVC2G86GT	NXP	Dual 2-input exclusive-OR gate	获取价格
74LVC2G86GT	NEXPERIA	Dual 2-input EXCLUSIVE-OR gateProduction	获取价格