5秒后页面跳转
74LVC1T45GM-Q100 PDF预览

74LVC1T45GM-Q100

更新时间: 2024-01-04 04:34:38
品牌 Logo 应用领域
安世 - NEXPERIA 逻辑集成电路
页数 文件大小 规格书
28页 349K
描述
Dual supply translating transceiver; 3-state

74LVC1T45GM-Q100 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:,Reach Compliance Code:unknown
风险等级:5.56JESD-609代码:e4
逻辑集成电路类型:BUS TRANSCEIVER湿度敏感等级:1
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)Base Number Matches:1

74LVC1T45GM-Q100 数据手册

 浏览型号74LVC1T45GM-Q100的Datasheet PDF文件第2页浏览型号74LVC1T45GM-Q100的Datasheet PDF文件第3页浏览型号74LVC1T45GM-Q100的Datasheet PDF文件第4页浏览型号74LVC1T45GM-Q100的Datasheet PDF文件第5页浏览型号74LVC1T45GM-Q100的Datasheet PDF文件第6页浏览型号74LVC1T45GM-Q100的Datasheet PDF文件第7页 
74LVC1T45-Q100;  
74LVCH1T45-Q100  
Dual supply translating transceiver; 3-state  
Rev. 3 — 19 March 2019  
Product data sheet  
1. General description  
The 74LVC1T45-Q100; 74LVCH1T45-Q100 are single bit, dual supply transceivers with 3-state  
outputs that enable bidirectional level translation. They feature two 1-bit input-output ports  
(A and B), a direction control input (DIR) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and  
VCC(B) can be supplied with any voltage between 1.2 V and 5.5 V. This flexibility makes the device  
suitable for translating between any of the low voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V and  
5.0 V). Pins A and DIR are referenced to VCC(A) and pin B is referenced to VCC(B). A HIGH on DIR  
allows transmission from A to B and a LOW on DIR allows transmission from B to A.  
The devices are fully specified for partial power-down applications using IOFF. The IOFF  
circuitry disables the output, preventing any damaging backflow current through the device  
when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level,  
both A port and B port are in the high-impedance OFF-state.  
Active bus hold circuitry in the 74LVCH1T45-Q100 holds unused or floating data inputs at a valid  
logic level.  
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100  
(Grade 1) and is suitable for use in automotive applications.  
2. Features and benefits  
Automotive product qualification in accordance with AEC-Q100 (Grade 1)  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
Wide supply voltage range:  
VCC(A): 1.2 V to 5.5 V  
VCC(B): 1.2 V to 5.5 V  
High noise immunity  
Complies with JEDEC standards:  
JESD8-7 (1.2 V to 1.95 V)  
JESD8-5 (1.8 V to 2.7 V)  
JESD8C (2.7 V to 3.6 V)  
JESD36 (4.5 V to 5.5 V)  
ESD protection:  
MIL-STD-883, method 3015 Class 3A exceeds 4000 V  
HBM JESD22-A114F Class 3A exceeds 4000 V  
Maximum data rates:  
420 Mbps (3.3 V to 5.0 V translation)  
210 Mbps (translate to 3.3 V))  
140 Mbps (translate to 2.5 V)  
75 Mbps (translate to 1.8 V)  
60 Mbps (translate to 1.5 V)  
Suspend mode  
Latch-up performance exceeds 100 mA per JESD 78 Class II  
±24 mA output drive (VCC = 3.0 V)  
Inputs accept voltages up to 5.5 V  
Low power consumption: 16 μA maximum ICC  
IOFF circuitry provides partial Power-down mode operation  
 
 

与74LVC1T45GM-Q100相关器件

型号 品牌 获取价格 描述 数据表
74LVC1T45GN NEXPERIA

获取价格

Dual supply translating transceiver; 3-stateProduction
74LVC1T45GS NEXPERIA

获取价格

Dual supply translating transceiver; 3-stateProduction
74LVC1T45GW NXP

获取价格

Dual supply translating transceiver; 3-state
74LVC1T45GW NEXPERIA

获取价格

Dual supply translating transceiver; 3-stateProduction
74LVC1T45GW,125 NXP

获取价格

74LVC(H)1T45 - Dual supply translating transceiver; 3-state TSSOP 6-Pin
74LVC1T45GW-Q010 NXP

获取价格

IC TRANSCEIVER, Bus Driver/Transceiver
74LVC1T45GW-Q100 NXP

获取价格

IC,BUS TRANSCEIVER,SINGLE,1-BIT,LCX/LVC-CMOS,TSSOP,6PIN,PLASTIC
74LVC1T45GW-Q100 NEXPERIA

获取价格

Dual supply translating transceiver; 3-state
74LVC1T45GW-Q100H NXP

获取价格

74LVC(H)1T45-Q100 - Dual supply translating transceiver; 3-state TSSOP 6-Pin
74LVC1T45-Q100 NEXPERIA

获取价格

Dual supply translating transceiver; 3-state