Datasheet > 74LVC10APW-Q100

74LVC10APW-Q100

更新时间： 2024-04-09 19:01:13

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
10页	234K
描述
Triple 3-input NAND gateProduction

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74LVC10APW-Q100 数据手册

Nexperia

74LVC10A-Q100

Triple 3-input NAND gate

6. Functional description

Table 3. Function selection

H = HIGH voltage level; L = LOW voltage level; X = don’t care

Input

Output

7. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

V_CC

I_IK

Parameter

Conditions

Min

-0.5

-50

-0.5

Max

+6.5

Unit

supply voltage

input clamping current

input voltage

V_I< 0 V

V_I

[1]

[2]

+6.5

±50

I_OK

output clamping current

output voltage

V_O> V_CCor V_O< 0 V

V_O= 0 V to V_CC

V_O

-0.5

V_CC+ 0.5

±50

I_O

output current

°C

I_CC

supply current

100

I_GND

P_tot

T_stg

ground current

-100

total power dissipation

storage temperature

T_amb= -40 °C to +125 °C

[3]

500

-65

+150

[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.

[2] The output voltage ratings may be exceeded if the output current ratings are observed.

[3] For SOT402-1 (TSSOP14) package: P_totderates linearly with 7.3 mW/K above 81 °C.

8. Recommended operating conditions

Table 5. Recommended operating conditions

Symbol

Parameter

Conditions

Min

1.65

1.2

Typ

Max

3.6

Unit

V_CC

supply voltage

functional

V_I

input voltage

5.5

+125

T_amb

Δt/ΔV

ambient temperature

in free air

-40

°C

ns/V

input transition rise and fall

rate

V_CC= 1.65 V to 2.7 V

V_CC= 2.7 V to 3.6 V

74LVC10A_Q100

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Product data sheet

Rev. 1 — 24 January 2024

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