Datasheet > 74LV541APWJ

74LV541APWJ

更新时间： 2025-09-25 19:14:43

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
14页	731K
描述
类型:缓冲器，非反向 ;功能单元数:1 ;位数(bit):8 ;最小工作电压(V):2V;最大工作电压(V):5.5V;元器件封装:20-TSSOP;

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74LV541APWJ 数据手册

74LV541A

Octal buffer/line driver; 3-state

Rev. 2 — 1 November 2016

Product data sheet

1. General description

The 74LV541A is an 8-bit buffer/line driver with 3-state outputs. The device features two

output enables (OE1 and OE2). A HIGH on OEn causes the associated outputs to

assume a high-impedance OFF-state.

Inputs are overvoltage tolerant. This feature allows the use of these devices as translators

in mixed voltage environments.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall

times.

This device is fully specified for partial power down applications using I_OFF. The I_OFF

circuitry disables the output, preventing the potentially damaging backflow current through

the device when it is powered down.

2. Features and benefits

 Wide supply voltage range from 2.0 V to 5.5 V

 Maximum t_pdof 6 ns at 5 V

 Typical V_OL(p)< 0.8 V at V_CC= 3.3 V, T_amb= 25 C

 Typical V_OH(v)> 2.3 V at V_CC= 3.3 V, T_amb= 25 C

 Supports mixed-mode voltage operation on all ports

 I_OFFcircuitry provides partial Power-down mode operation

 Latch-up performance exceeds 250 mA per JESD 78 Class II

 ESD protection:

 HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3kV

 MM JESD22-A115-A exceeds 200 V

 CDM JESD22-C101E exceeds 2kV

 Specified from 40 C to +85 C and from 40 C to +125 C

12 3 4 5 6 7...14

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型号	品牌	获取价格	描述	数据表
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74LV541ATPWJ	NEXPERIA	获取价格	元器件封装:20-TSSOP;
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