Datasheet > 74LV541ATPW

74LV541ATPW

更新时间： 2022-02-26 12:41:25

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
13页	733K
描述
Octal buffer/line driver; 3-state

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74LV541ATPW 数据手册

74LV541AT

Octal buffer/line driver; 3-state

Rev. 3 — 3 November 2016

Product data sheet

1. General description

The 74LV541AT is an 8-bit buffer/line driver with 3-state outputs and TTL inputs. The

device features two output enables (OE1 and OE2). A HIGH on OEn causes the

associated outputs to assume a high-impedance OFF-state.

Designed to operate over a V_CCrange from 4.5 V to 5.5 V, the inputs are TTL compatible,

which allows the device to be used to translate from 3.3 V to 5 V.

Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall

times.

This device is fully specified for partial Power-down applications using I_OFF

The I_OFFcircuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

2. Features and benefits

 Direct interface with TTL levels

 Supply voltage range from 4.5 V to 5.5 V

 Typical t_pdof 2.8 ns at 5 V

 Typical V_OL(p)< 0.8 V at V_CC= 5 V, T_amb= 25 C

 Typical V_OH(v)> 2.3 V at V_CC= 5 V, T_amb= 25 C

 Supports mixed-mode voltage operation on all ports

 I_OFFcircuitry provides partial Power-down mode operation

 Latch-up performance exceeds 250 mA per JESD 78 Class II

 ESD protection:

 HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3kV

 MM JESD22-A115-A exceeds 200 V

 CDM JESD22-C101E exceeds 2kV

 Specified from 40 C to +85 C and from 40 C to +125 C

12 3 4 5 6 7...13

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