74LS83AFCQR

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74LS83AFCQR 技术参数

August 1986

Revised March 2000

DM74LS83A

4-Bit Binary Adder with Fast Carry

General Description

Features

These full adders perform the addition of two 4-bit binary

numbers. The sum (∑) outputs are provided for each bit

and the resultant carry (C4) is obtained from the fourth bit.

These adders feature full internal look ahead across all four

bits. This provides the system designer with partial look-

ahead performance at the economy and reduced package

count of a ripple-carry implementation.

■ Full-carry look-ahead across the four bits

■ Systems achieve partial look-ahead performance with

the economy of ripple carry

■ Typical add times

Two 8-bit words 25 ns

Two 16-bit words 45 ns

■ Typical power dissipation per 4-bit adder 95 mW

The adder logic, including the carry, is implemented in its

true form meaning that the end-around carry can be

accomplished without the need for logic or level inversion.

Ordering Code:

Order Number Package Number

Package Description

DM74LS83AN

N16E

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Connection Diagram

DS006378

www.fairchildsemi.com

12 3 4 5

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型号	品牌	获取价格	描述	数据表
74LS83AJ	RAYTHEON	获取价格	Adder/Subtractor, TTL, CDIP16,
74LS83AN	RAYTHEON	获取价格	Adder/Subtractor, TTL, PDIP16,
74LS83APC	FAIRCHILD	获取价格	4-BIT BINARY FULL ADDER
74LS83APCQM	FAIRCHILD	获取价格	Adder/Subtractor, TTL, PDIP16,
74LS83APCQM	ROCHESTER	获取价格	Adder/Subtractor,
74LS83APCQR	FAIRCHILD	获取价格	Adder/Subtractor, TTL, PDIP16,
74LS83APCQR	ROCHESTER	获取价格	Adder/Subtractor,
74LS83ASC	FAIRCHILD	获取价格	Adder/Subtractor, TTL, PDSO16,
74LS83F	NXP	获取价格	IC LS SERIES, 4-BIT ADDER/SUBTRACTOR, CDIP16, Arithmetic Circuit
74LS848	MOTOROLA	获取价格	8-INPUT PRIORITY ENCODERS WITH 3-STATE OUTPUTS