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74HCT4067PW,118 PDF预览

74HCT4067PW,118

更新时间: 2024-01-04 17:57:01
品牌 Logo 应用领域
恩智浦 - NXP 光电二极管
页数 文件大小 规格书
29页 158K
描述
74HC(T)4067 - 16-channel analog multiplexer/demultiplexer TSSOP2 24-Pin

74HCT4067PW,118 技术参数

生命周期:Active零件包装代码:TSSOP2
包装说明:TSSOP,针数:24
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:0.72模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXER
JESD-30 代码:R-PDSO-G24JESD-609代码:e4
长度:7.8 mm湿度敏感等级:1
信道数量:16功能数量:1
端子数量:24标称断态隔离度:50 dB
通态电阻匹配规范:9 Ω最大通态电阻 (Ron):180 Ω
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.1 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):4.5 V
表面贴装:YES最长断开时间:83 ns
最长接通时间:90 ns技术:CMOS
温度等级:AUTOMOTIVE端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:4.4 mmBase Number Matches:1

74HCT4067PW,118 数据手册

 浏览型号74HCT4067PW,118的Datasheet PDF文件第3页浏览型号74HCT4067PW,118的Datasheet PDF文件第4页浏览型号74HCT4067PW,118的Datasheet PDF文件第5页浏览型号74HCT4067PW,118的Datasheet PDF文件第7页浏览型号74HCT4067PW,118的Datasheet PDF文件第8页浏览型号74HCT4067PW,118的Datasheet PDF文件第9页 
74HC4067; 74HCT4067  
NXP Semiconductors  
16-channel analog multiplexer/demultiplexer  
6. Pinning information  
6.1 Pinning  
74HC4067  
74HCT4067  
74HC4067  
terminal 1  
index area  
74HCT4067  
1
2
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
Z
Y7  
V
CC  
2
3
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
Y7  
Y6  
Y5  
Y4  
Y3  
Y2  
Y1  
Y0  
S0  
S1  
Y8  
Y8  
Y9  
3
Y6  
Y9  
4
Y10  
Y11  
Y12  
Y13  
Y14  
Y15  
E
4
Y5  
Y10  
Y11  
Y12  
Y13  
Y14  
Y15  
E
5
5
Y4  
6
6
Y3  
7
7
Y2  
8
8
Y1  
9
9
Y0  
(1)  
CC  
10  
11  
V
10  
11  
12  
S0  
S2  
S1  
S2  
GND  
S3  
001aag731  
001aag730  
Transparent top view  
(1) The die substrate is attached to this pad using  
conductive die attach material. It can not be used as  
supply pin or input.  
Fig 6. Pin configuration for DIP24, SO24, SSOP24 and  
TSSOP24  
Fig 7. Pin configuration for DHVQFN24  
6.2 Pin description  
Table 2.  
Symbol  
Z
Pin description  
Pin  
1
Description  
common input/output  
independent input/output 7  
independent input/output 6  
independent input/output 5  
independent input/output 4  
independent input/output 3  
independent input/output 2  
independent input/output 1  
independent input/output 0  
address input 0  
Y7  
2
Y6  
3
Y5  
4
Y4  
5
Y3  
6
Y2  
7
Y1  
8
Y0  
9
S0  
10  
11  
12  
13  
14  
S1  
address input 1  
GND  
S3  
ground (0 V)  
address input 3  
S2  
address input 2  
74HC_HCT4067_3  
© NXP B.V. 2007. All rights reserved.  
Product data sheet  
Rev. 03 — 15 October 2007  
6 of 29  
 
 
 

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