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74HC32D PDF预览

74HC32D

更新时间: 2024-11-29 11:10:03
品牌 Logo 应用领域
安世 - NEXPERIA 光电二极管逻辑集成电路触发器
页数 文件大小 规格书
12页 234K
描述
Quad 2-input OR gateProduction

74HC32D 数据手册

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74HC32; 74HCT32  
Quad 2-input OR gate  
Rev. 8 — 30 July 2021  
Product data sheet  
1. General description  
The 74HC32; 74HCT32 is a quad 2-input OR gate. Inputs include clamp diodes. This enables the  
use of current limiting resistors to interface inputs to voltages in excess of VCC  
.
2. Features and benefits  
Wide supply voltage range from 2.0 to 6.0 V  
CMOS low power dissipation  
High noise immunity  
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B  
Complies with JEDEC standards:  
JESD8C (2.7 V to 3.6 V)  
JESD7A (2.0 V to 6.0 V)  
Input levels:  
For 74HC32: CMOS level  
For 74HCT32: TTL level  
Symmetrical output impedance  
Balanced propagation delays  
ESD protection:  
HBM JESD22-A114F exceeds 2000 V  
MM JESD22-A115-A exceeds 200 V  
Multiple package options  
Specified from -40 °C to +85 °C and from -40 °C to +125 °C  
3. Ordering information  
Table 1. Ordering information  
Type number  
Package  
Temperature range Name  
Description  
Version  
74HC32D  
-40 °C to +125 °C  
-40 °C to +125 °C  
-40 °C to +125 °C  
SO14  
plastic small outline package; 14 leads;  
body width 3.9 mm  
SOT108-1  
74HCT32D  
74HC32PW  
74HCT32PW  
74HC32BQ  
74HCT32BQ  
TSSOP14  
DHVQFN14  
plastic thin shrink small outline package;  
14 leads; body width 4.4 mm  
SOT402-1  
SOT762-1  
plastic dual in-line compatible thermal  
enhanced very thin quad flat package; no leads;  
14 terminals; body 2.5 × 3 × 0.85 mm  
 
 
 

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