Datasheet > 74HC193PW-Q100J

74HC193PW-Q100J

更新时间： 2024-02-10 11:27:57

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
29页	190K
描述
74HC(T)193-Q100 - Presettable synchronous 4-bit binary up/down counter TSSOP 16-Pin

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74HC193PW-Q100J 技术参数

74HC193-Q100; 74HCT193-Q100

NXP Semiconductors

Presettable synchronous 4-bit binary up/down counter

6. Functional description

Table 3.

Function table^[1]

Operating mode

Inputs

Outputs

MR PL

CPU CPD D0

TCU TCD

Reset (clear)

Parallel load



H^[3]



H^[2]

Count up

count up

Count down

count down

[1] H = HIGH voltage level

L = LOW voltage level

X = don’t care

 = LOW-to-HIGH clock transition.

[2] TCU = CPU at terminal count up (HHHH)

[3] TCD = CPD at terminal count down (LLLL).

74HC_HCT139_Q100

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Product data sheet

Rev. 1 — 12 July 2013

6 of 29

1...3 4 567 8 9...29

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