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74F573SJX PDF预览

74F573SJX

更新时间: 2024-11-20 23:24:07
品牌 Logo 应用领域
其他 - ETC 锁存器逻辑集成电路光电二极管驱动
页数 文件大小 规格书
7页 72K
描述
8-Bit D-Type Latch

74F573SJX 数据手册

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April 1988  
Revised October 2000  
74F573  
Octal D-Type Latch with 3-STATE Outputs  
General Description  
The 74F573 is a high speed octal latch with buffered com-  
mon Latch Enable (LE) and buffered common Output  
Enable (OE) inputs.  
Features  
Inputs and outputs on opposite sides of package  
allowing easy interface with microprocessors  
Useful as input or output port for microprocessors  
Functionally identical to 74F373  
This device is functionally identical to the 74F373 but has  
different pinouts.  
3-STATE outputs for bus interfacing  
Guaranteed 4000V minimum ESD protection  
Ordering Code:  
Order Number Package Number  
Package Description  
74F573SC  
74F573SJ  
74F573PC  
M20B  
M20D  
N20A  
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide  
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide  
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
© 2000 Fairchild Semiconductor Corporation  
DS009566  
www.fairchildsemi.com  

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