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74F251AD PDF预览

74F251AD

更新时间: 2024-11-30 13:04:55
品牌 Logo 应用领域
恩智浦 - NXP 复用器
页数 文件大小 规格书
5页 48K
描述
IC F/FAST SERIES, 8 LINE TO 1 LINE MULTIPLEXER, COMPLEMENTARY OUTPUT, PDSO16, Multiplexer/Demultiplexer

74F251AD 技术参数

生命周期:Obsolete包装说明:SOP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.7系列:F/FAST
JESD-30 代码:R-PDSO-G16负载电容(CL):50 pF
逻辑集成电路类型:MULTIPLEXER功能数量:1
输入次数:8输出次数:1
端子数量:16最高工作温度:70 °C
最低工作温度:输出特性:3-STATE
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE最大电源电流(ICC):27 mA
传播延迟(tpd):9.5 ns认证状态:Not Qualified
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:TTL温度等级:COMMERCIAL
端子形式:GULL WING端子位置:DUAL
Base Number Matches:1

74F251AD 数据手册

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Philips Semiconductors  
Product specification  
8-input multiplexer (3-State)  
74F251A  
FEATURES  
PIN CONFIGURATION  
High speed 8-to-1 multiplexing  
I3  
I2  
I1  
I0  
Y
1
2
3
4
5
16  
V
On chip decoding  
CC  
15 I4  
14 I5  
13 I6  
12 I7  
11 S0  
10 S1  
Multifunction capability  
Inverting and Non-Inverting outputs  
Both outputs are 3-State for further multiplexer expansion  
Y
OE  
6
7
8
DESCRIPTION  
The 74F251A is a logic implementation of a single 8-position switch  
with the switch position controlled by the state of three Select (S0,  
S1, S2) inputs. True (Y) and complementary (Y) outputs are both  
provided. The output enable (OE) is active Low. When OE is High,  
both outputs are in High impedance state, allowing multiple output  
connections to a common bus without driving nor loading the bus  
significantly. All but one device must be in High impedance state to  
avoid high currents that would exceed the maximum ratings when  
the outputs of the 3-State devices are tied together. When the output  
of more than one device is tied together the user must ensure that  
there is no overlap in the active Low portion of the output enable  
voltages.  
GND  
9
S2  
SF00778  
TYPICAL  
PROPAGATION  
DELAY  
TYPICAL  
SUPPLY CURRENT  
(TOTAL)  
TYPE  
74F251A  
4.5ns  
19mA  
ORDERING INFORMATION  
ORDER CODE  
PKG  
DWG #  
COMMERCIAL RANGE  
DESCRIPTION  
V
CC  
= 5V ±10%,  
T
amb  
= 0°C to +70°C  
16-pin plastic DIP  
16-pin plastic SO  
N74F251AN  
N74F251AD  
SOT38-4  
SOT162-1  
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE  
PINS  
I0–I7  
S0–S2  
OE  
DESCRIPTION  
74F (U.L.) HIGH/LOW  
1.0/1.0  
LOAD VALUE HIGH/LOW  
Data inputs  
20µA/0.6mA  
20µA/0.6mA  
20µA/0.6mA  
3mA/24mA  
Select inputs  
1.0/1.0  
Output Enable input (active Low)  
Data outputs  
1.0/1.0  
Y, Y  
150/40  
NOTE:  
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.  
LOGIC SYMBOL  
IEC/IEEE SYMBOL  
4
3
2
1
15 14 13 12  
MUX  
7
EN  
0
11  
10  
9
0
7
G
5
6
I0  
I1  
I2  
I3  
I4  
I5  
I6  
I7  
2
4
11  
10  
S0  
3
S1  
S2  
OE  
2
9
7
1
Y
5
Y
15  
14  
13  
12  
V
= Pin 16  
GND = Pin 8  
CC  
6
SF00779  
SF00780  
1
1996 Jan 05  
853–0358 16191  

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