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74ACT157FC PDF预览

74ACT157FC

更新时间: 2024-11-26 13:04:51
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD 解复用器逻辑集成电路光电二极管
页数 文件大小 规格书
9页 100K
描述
Multiplexer, ACT Series, 4-Func, 2 Line Input, 1 Line Output, True Output, CMOS, CDFP16, CERAMIC, FP-16

74ACT157FC 技术参数

生命周期:Obsolete零件包装代码:DFP
包装说明:CERAMIC, FP-16针数:16
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.07Is Samacsys:N
系列:ACTJESD-30 代码:R-CDFP-F16
逻辑集成电路类型:MULTIPLEXER功能数量:4
输入次数:2输出次数:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C输出极性:TRUE
封装主体材料:CERAMIC, METAL-SEALED COFIRED封装代码:DFP
封装形状:RECTANGULAR封装形式:FLATPACK
传播延迟(tpd):10.5 ns认证状态:Not Qualified
座面最大高度:2.159 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
宽度:6.731 mmBase Number Matches:1

74ACT157FC 数据手册

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November 1988  
Revised November 1999  
74AC157 74ACT157  
Quad 2-Input Multiplexer  
General Description  
Features  
The AC/ACT157 is a high-speed quad 2-input multiplexer.  
Four bits of data from two sources can be selected using  
the common Select and Enable inputs. The four outputs  
present the selected data in the true (noninverted) form.  
The AC/ACT157 can also be used as a function generator.  
ICC and IOZ reduced by 50%  
Outputs source/sink 24 mA  
ACT157 has TTL-compatible inputs  
Ordering Code:  
Order Number Package Number  
Package Description  
74AC157SC  
74AC157SJ  
M16A  
M16D  
MTC16  
N16E  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
74AC157MTC  
74AC157PC  
74ACT157SC  
74ACT157SJ  
74ACT157MTC  
74ACT157PC  
16 -Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150Narrow Body  
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide  
M16A  
M16D  
MTC16  
N16E  
16 -Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide  
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300Wide  
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.  
Logic Symbols  
Connection Diagram  
IEEE/IEC  
Pin Descriptions  
Pin Names  
Description  
I0aI0d  
1aI1d  
Source 0 Data Inputs  
Source 1 Data Inputs  
Enable Input  
I
E
S
Select Input  
ZaZd  
Outputs  
FACT is a trademark of Fairchild Semiconductor Corporation.  
© 1999 Fairchild Semiconductor Corporation  
DS009929  
www.fairchildsemi.com  

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