5秒后页面跳转
74ACT11286 PDF预览

74ACT11286

更新时间: 2024-11-20 23:00:15
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器
页数 文件大小 规格书
6页 101K
描述
9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

74ACT11286 数据手册

 浏览型号74ACT11286的Datasheet PDF文件第2页浏览型号74ACT11286的Datasheet PDF文件第3页浏览型号74ACT11286的Datasheet PDF文件第4页浏览型号74ACT11286的Datasheet PDF文件第5页浏览型号74ACT11286的Datasheet PDF文件第6页 
74ACT11286  
9-BIT PARITY GENERATOR/CHECKER  
WITH BUS DRIVER PARITY I/O PORTS  
SCAS069B – AUGUST 1988 – REVISED APRIL 1996  
D OR N PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Generates Either Odd or Even Parity for  
Nine Data Lines  
B
A
C
D
E
V
F
G
H
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Cascadable for n-Bits Parity  
Center-Pin V  
Minimize High-Speed Switching Noise  
and GND Configurations  
PARITY I/O  
GND  
PARITY ERROR  
CC  
CC  
EPIC (Enhanced-Performance Implanted  
CMOS) 1- m Process  
XMIT  
I
8
500-mA Typical Latch-Up Immunity at  
125°C  
Package Options Include Plastic  
Small-Outline (D) Packages and Standard  
Plastic 300-mil DIPs (N)  
description  
The 74ACT11286 universal 9-bit parity generator/checker features a local output for parity checking and a  
bus-driving parity I/O port for parity generation/checking. The word-length capability is easily expanded by  
cascading.  
The XMITcontrolinputisimplementedspecificallytoaccommodatecascading. WhentheXMITislow, theparity  
tree is disabled and the PARITY ERROR output remains at a high logic level, regardless of the input levels.  
When XMIT is high, the parity tree is enabled. PARITY ERROR indicates a parity error when either an even  
number of inputs (A through I) are high and PARITY I/O is forced to a low logic level, or when an odd number  
of inputs are high and PARITY I/O is forced to a high logic level.  
The I/O control circuitry is designed so that the I/O port remains in the high-impedance state during power up  
or power down, to prevent bus glitches.  
The 74ACT11286 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
NUMBER OF INPUTS  
(A–I ) THAT  
PARITY  
ERROR  
OUTPUT  
XMIT  
INPUT  
PARITY  
I/O  
ARE HIGH  
0, 2, 4, 6, 8  
1, 3, 5, 7, 9  
l
H
L
h
l
H
H
H
L
l
h
h
h
h
0, 2, 4, 6, 8  
1, 3, 5, 7, 9  
h
l
L
H
h = high input level, H = high output level, I = low input level,  
L = low output level  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

与74ACT11286相关器件

型号 品牌 获取价格 描述 数据表
74ACT11286D TI

获取价格

9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS
74ACT11286D NXP

获取价格

9-bit odd/even parity generator/checker with bus drive l/O port
74ACT11286D PHILIPS

获取价格

Parity Generator/Checker, CMOS, PDSO14
74ACT11286D YAGEO

获取价格

Parity Generator/Checker, ACT Series, 9-Bit, True Output, CMOS, PDSO14
74ACT11286DG4 TI

获取价格

ACT SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PDSO14, GREEN, PLASTIC, MS-012AB,
74ACT11286DR ETC

获取价格

Parity Generator/Checker
74ACT11286DRE4 TI

获取价格

ACT SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PDSO14, GREEN, PLASTIC, MS-012AB,
74ACT11286DRG4 TI

获取价格

ACT SERIES, 9-BIT PARITY GENERATOR/CHECKER, TRUE OUTPUT, PDSO14, GREEN, PLASTIC, MS-012AB,
74ACT11286D-T PHILIPS

获取价格

Parity Generator/Checker, CMOS, PDSO14
74ACT11286D-T YAGEO

获取价格

Parity Generator/Checker, ACT Series, 9-Bit, True Output, CMOS, PDSO14