Datasheet > 74AC574TTR

74AC574TTR

更新时间： 2024-11-17 23:24:03

品牌	Logo	应用领域
其他 - ETC		触发器逻辑集成电路光电二极管驱动
页数	文件大小	规格书
11页	83K
描述
Octal D-Type Flip-Flop

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中文翻译

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数据手册

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74AC574TTR 数据手册

74AC574

OCTAL D-TYPE FLIP-FLOP

WITH 3 STATE OUTPUTS (NON INVERTED)

■

HIGH SPEED:

= 250MHz (TYP.) at V = 5V

MAX

LOW POWER DISSIPATION:

= 4µA(MAX.) at T =25°C

HIGH NOISE IMMUNITY:

= V = 28 % V (MIN.)

NIH

NIL

DIP

SOP

TSSOP

T & R

50Ω TRANSMISSION LINE DRIVING

CAPABILITY

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 24mA (MIN)

ORDER CODES

PACKAGE

BALANCED PROPAGATION DELAYS:

TUBE

PLH

PHL

DIP

SOP

74AC574B

74AC574M

OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

74AC574MTR

74AC574TTR

TSSOP

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 574

IMPROVED LATCH-UP IMMUNITY

While the (OE) input is low, the 8 outputs will be in

a normal logic state (high or low logic level); while

OE is in high level, the outputs will be in a high

impedance state.

DESCRIPTION

The 74AC574 is an advanced high-speed CMOS

The output control does not affect the internal

operation of flip-flops; that is, the old data can be

retained or the new data can be entered even

while the outputs are off.

OCTAL D-TYPE FLIP-FLOP with

3 STATE

OUTPUTS NON INVERTING fabricated with

sub-micron silicon gate and double-layer metal

wiring C MOS technology.

All inputs and outputs are equipped with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

These 8 bit D-Type Flip-Flop are controlled by a

clock input (CK) and an output enable input (OE).

On the positive transition of the clock, the Q

outputs will be set to the logic that were setup at

the D inputs.

PIN CONNECTION AND IEC LOGIC SYMBOLS

April 2001

1/11

12 3 4 5 6 7...11

中文翻译

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