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74ABT823 PDF预览

74ABT823

更新时间: 2024-02-22 00:55:21
品牌 Logo 应用领域
恩智浦 - NXP 触发器
页数 文件大小 规格书
7页 80K
描述
9-bit D-type flip-flop with reset and enable 3-State

74ABT823 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:4.40 MM, PLASTIC, MO-153, SOT355-1, TSSOP-24
针数:24Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:5.82
Is Samacsys:N其他特性:WITH CLEAR AND CLOCK ENABLE
系列:ABTJESD-30 代码:R-PDSO-G24
JESD-609代码:e4长度:7.8 mm
负载电容(CL):50 pF逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:125000000 Hz最大I(ol):0.064 A
湿度敏感等级:1位数:9
功能数量:1端口数量:2
端子数量:24最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP24,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
包装方法:TAPE AND REEL峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):34 mA
传播延迟(tpd):6.8 ns认证状态:Not Qualified
座面最大高度:1.1 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30触发器类型:POSITIVE EDGE
宽度:4.4 mmBase Number Matches:1

74ABT823 数据手册

 浏览型号74ABT823的Datasheet PDF文件第1页浏览型号74ABT823的Datasheet PDF文件第2页浏览型号74ABT823的Datasheet PDF文件第3页浏览型号74ABT823的Datasheet PDF文件第4页浏览型号74ABT823的Datasheet PDF文件第5页浏览型号74ABT823的Datasheet PDF文件第7页 
Philips Semiconductors  
Product specification  
9-bit D-type flip-flop with reset and enable  
(3-State)  
74ABT823  
AC WAVEFORMS  
V
M
= 1.5V, V = GND to 3.0V  
IN  
MR  
V
V
M
M
1/f  
MAX  
t
(L)  
t
w
REC  
CP  
V
V
M
M
t
CP  
Qn  
V
M
(H)  
t
(L)  
W
W
t
t
PLH  
PHL  
t
PHL  
V
Q
n
V
M
M
V
M
SA00232  
Waveform 2. Master Reset Pulse WIdth, Master Reset to Output  
Delay and Master Reset to Clock Recovery Time  
SA00159  
Waveform 1. Propagation Delay, Clock Input to Output, Clock  
Pulse Width, and Maximum Clock Frequency  
V
V
M
OE  
Qn  
M
Dn, CE  
V
V
V
V
M
M
M
M
t
t
PHZ  
PZH  
t (H)  
t
(H)  
t (L)  
t (L)  
h
s
h
s
V
–0.3V  
0V  
OH  
V
M
CP  
V
V
M
M
NOTE: The shaded areas indicate when the input is permitted to change for  
predictable output performance.  
SA00066  
SA00231  
Waveform 4. 3-State Output Enable Time to High Level and  
Output Disable Time from High Level  
Waveform 3. Data Setup and Hold Times  
OE  
V
V
M
M
t
t
PLZ  
PZL  
V
M
Qn  
V
+0.3V  
OL  
0V  
SA00067  
Waveform 5. 3-State Output Enable Time to Low Level and  
Output Disable Time from Low Level  
6
1995 Sep 06  

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