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74ABT162823ADGGRE4 PDF预览

74ABT162823ADGGRE4

更新时间: 2024-01-28 18:41:30
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器触发器逻辑集成电路光电二极管输出元件信息通信管理
页数 文件大小 规格书
10页 180K
描述
18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

74ABT162823ADGGRE4 技术参数

是否无铅: 含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP56,.3,20针数:56
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.77其他特性:WITH CLEAR AND CLOCK ENABLE
系列:ABTJESD-30 代码:R-PDSO-G56
长度:14 mm逻辑集成电路类型:BUS DRIVER
最大频率@ Nom-Sup:150000000 Hz最大I(ol):0.012 A
位数:9功能数量:2
端口数量:2端子数量:56
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE WITH SERIES RESISTOR输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH包装方法:TAPE AND REEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
最大电源电流(ICC):80 mAProp。Delay @ Nom-Sup:7.5 ns
传播延迟(tpd):7.5 ns认证状态:Not Qualified
座面最大高度:1.2 mm子类别:FF/Latches
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:6.1 mm
Base Number Matches:1

74ABT162823ADGGRE4 数据手册

 浏览型号74ABT162823ADGGRE4的Datasheet PDF文件第3页浏览型号74ABT162823ADGGRE4的Datasheet PDF文件第4页浏览型号74ABT162823ADGGRE4的Datasheet PDF文件第5页浏览型号74ABT162823ADGGRE4的Datasheet PDF文件第7页浏览型号74ABT162823ADGGRE4的Datasheet PDF文件第8页浏览型号74ABT162823ADGGRE4的Datasheet PDF文件第9页 
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ꢇꢊ ꢎꢅꢏ ꢆ ꢅ ꢐꢀ ꢎꢏ ꢁꢆ ꢑꢒꢓꢄꢔ ꢑ ꢓꢕ ꢏ ꢖ ꢎꢓꢕꢗ ꢖ ꢀ  
ꢘꢏ ꢆ ꢙ ꢋ ꢎꢀꢆꢄꢆ ꢑ ꢗꢐꢆ ꢖꢐ ꢆꢀ  
SCBS666B − JULY 1996 − REVISED JUNE 2004  
PARAMETER MEASUREMENT INFORMATION  
7 V  
TEST  
S1  
Open  
S1  
500 Ω  
From Output  
Under Test  
t
/t  
PLH PHL  
Open  
7 V  
GND  
t
/t  
PLZ PZL  
C
= 50 pF  
t
/t  
Open  
L
PHZ PZH  
500 Ω  
(see Note A)  
3 V  
0 V  
LOAD CIRCUIT  
Timing Input  
Data Input  
1.5 V  
t
w
t
t
h
su  
3 V  
0 V  
3 V  
0 V  
Input  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
3 V  
0 V  
3 V  
0 V  
Output  
Control  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Input  
t
PZL  
t
t
t
PHL  
PLH  
PHL  
t
PLZ  
Output  
Waveform 1  
S1 at 7 V  
3.5 V  
V
V
OH  
1.5 V  
1.5 V  
1.5 V  
1.5 V  
Output  
V
V
+ 0.3 V  
OL  
V
OL  
OL  
(see Note B)  
t
PHZ  
t
PLH  
t
PZH  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
OH  
V
V
OH  
− 0.3 V  
OH  
1.5 V  
1.5 V  
Output  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. includes probe and jig capacitance.  
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.  
E. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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